This page contains the Sindhu_Prasana_Nfa Package documentation.
Bases: netbench.pattern_match.nfa_reductions.nfa_reductions
Implementation of NFA in FPGA acording: Reetinder Sidhu and Viktor K. Prasana: Fast Regular Expression Matching using FPGAs, In Proceedings of the 9. Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM‘01), 2001.
Generated VHDL code depends on those modules: value_decoder.vhd, state.vhd and final_bitmap.vhd. Those modules are located in directory templates/vhdl.
Supported symbols for this algorithm are sym_char and sym_kchar if stride parameter is bigger than 1. When strided automaton is used, char classes are used as char class removal for strided nfa generate very huge automata.
Experimantal extension for strided symbols added.
Parameter: | stride (int) – Number of characters accepted in one clock cycle. Defaults to 1 char per CLK. |
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Return HDL description of NFA unit implemented by Sindhu and Prasana’s approach.
Returns: | HDL description of NFA unit implemented by Sindhu and Prasana’s approach. |
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Return type: | string |
Reports amount of logic consumed by the algorithm.
Returns: | Amount of logic consumed by the algorithm (LUTs, FlipFlops, BRAMs) |
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Return type: | tuple(int, int, int) |
Creates simulation files from templates for object specified by alg parameter.
Parameter: | alg (b_ptrn_match) – Object representing pattern matching algorithm. |
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Open file specified by name and split content acording to “%$%”.
Parameter: | name (string) – Name of the file. |
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Returns: | Loaded and splited content of the file. |
Return type: | list(string) |
Runs the simulation and compare the results.
Parameter: | test – Object representing the test. |
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Returns: | True when simulation is OK, False otherwise. |
Return type: | boolean |
Save the content stored in parameter content into file named by parameter name.
Parameters: |
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Bases: unittest.TestCase
A base test class for Sindhu Prasana NFA.