Faculty of Information Technology, BUT

Publication Details

Software Fault Tolerance: the Evaluation by Functional Verification

ČEKAN Ondřej, PODIVÍNSKÝ Jakub and KOTÁSEK Zdeněk. Software Fault Tolerance: the Evaluation by Functional Verification. In: Proceedings of the 18th Euromicro Conference on Digital Systems Design. Funchal: IEEE Computer Society, 2015, pp. 284-287. ISBN 978-1-4673-8035-5.
Czech title
Softwarová odolnost proti poruchám: vyhodnocení pomocí funkční verifikace
Type
conference paper
Language
english
Authors
Keywords
Software Fault Tolerance
SFT
Processor
Fault Injection
Electro-mechanical Systems
Functional Verification
Abstract
The aim of this paper is to present a new approach in evaluating Software Fault Tolerance (SFT) methodologies. It is the way on how to ensure fault tolerance without any additional hardware as is common in frequently used Triple Modular Redundancy (TMR). As our research is focused on electromechanical systems which are commonly driven by processors or Multi Processors Systems on Chip (MPSoC) we decided to use the soft-core processor running on Field Programmable Gate Array (FPGA) as our experimental platform. The new approach uses Functional Verification for automation of the evaluation process. The functional verification environment is one of the important parts of the presented evaluation platform architecture. Programs generation for a processor, where SFT is applied, is also important. Experiments with the programs generator and fault injection are presented and goals for future work are identified on that basis.
Published
2015
Pages
284-287
Proceedings
Proceedings of the 18th Euromicro Conference on Digital Systems Design
Conference
18th Euromicro Conference on Digital Systems Design, Funchal, PT
ISBN
978-1-4673-8035-5
Publisher
IEEE Computer Society
Place
Funchal, PT
DOI
BibTeX
@INPROCEEDINGS{FITPUB10977,
   author = "Ond\v{r}ej \v{C}ekan and Jakub Podiv\'{i}nsk\'{y} and Zden\v{e}k Kot\'{a}sek",
   title = "Software Fault Tolerance: the Evaluation by Functional Verification",
   pages = "284--287",
   booktitle = "Proceedings of the 18th Euromicro Conference on Digital Systems Design",
   year = 2015,
   location = "Funchal, PT",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4673-8035-5",
   doi = "10.1109/DSD.2015.97",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/10977"
}
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