Faculty of Information Technology, BUT

Publication Details

Fast Packet Classification Algorithm in Hardware

PUŠ Viktor. Fast Packet Classification Algorithm in Hardware. In: Junior Scientist Conference 2008. Vídeň, 2008, pp. 65-66. ISBN 978-3-200-01612-5.
Czech title
Rychlá klasifikace paketů v hardware
Type
conference paper
Language
english
Authors
Puš Viktor, Ing. (DCSY FIT BUT)
Keywords
Packet classification, hardware
Abstract
Packet classification is an important operation for applications such as
routers, firewalls or intrusion detection systems. Many algorithms and
hardware architectures for packet classification have been created, but
none of them can compete with the speed of TCAMs in the worst case.
I propose new
hardware-based algorithm for packet classification. The solution is based
on problem decomposition and is aimed at the highest network speeds. A unique
property of the algorithm is the constant time complexity in terms of
external memory accesses. The algorithm performs exactly two external
memory accesses to classify a packet. Using FPGA and one commodity SRAM
chip, a throughput of 150 million packets per second can be achieved.
Annotation
Packet classification is an important operation for applications such as
routers, firewalls or intrusion detection systems. Many algorithms and
hardware architectures for packet classification have been created, but
none of them can compete with the speed of TCAMs in the worst case.
I propose new
hardware-based algorithm for packet classification. The solution is based
on problem decomposition and is aimed at the highest network speeds. A unique
property of the algorithm is the constant time complexity in terms of
external memory accesses. The algorithm performs exactly two external
memory accesses to classify a packet. Using FPGA and one commodity SRAM
chip, a throughput of 150 million packets per second can be achieved.

Published
2008
Pages
65-66
Proceedings
Junior Scientist Conference 2008
Conference
Junior Scientist Conference 2008, Vídeň, AT
ISBN
978-3-200-01612-5
Place
Vídeň, AT
BibTeX
@INPROCEEDINGS{FITPUB8798,
   author = "Viktor Pu\v{s}",
   title = "Fast Packet Classification Algorithm in Hardware",
   pages = "65--66",
   booktitle = "Junior Scientist Conference 2008",
   year = 2008,
   location = "V\'{i}de\v{n}, AT",
   ISBN = "978-3-200-01612-5",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/8798"
}
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