Embedded Tutorial: AI vs. Verification Engineer: Fight or Synergy?

The paper investigates the application of Artificial Intelligence (AI) algorithms in two critical areas of simulation based verification: (1) the development of verification testbenches (2) debugging activities within simulation environments. The primary objective is to assess how AI can enhance the productivity of verification engineers and improve the overall efficiency and quality of verification workflows in industrial practice. The paper presents the role of functional verification in the chip development flow, reviews widely adopted verification methodologies, AI techniques already used for automation and analysis, as well as the recent state-of-the-art research activities targeting emerging verification challenges. A key contribution is the identification of a significant gap in publicly available, high-quality open-source datasets tailored specifically for training AI models in hardware verification tasks. To ground the discussion in industrial reality, the paper also presents results from a survey conducted among 50 verification engineers, providing insight into which parts of a testbench could most benefit from AI-driven code generation or AI assistance. By combining a comprehensive state-of-the-art review with empirical insights from industry practitioners, this paper provides a structured analysis of current limitations and outlines concrete future research directions aligned with real world verification needs.