Leveraging design static analysis for vertical reuse: Analytical interpretation and scalability behavior

The Portable Test and Stimulus Standard (PSS) is an emerging standard enabling higher abstraction for simulation-based verification through graph-based stimulus generation, promoting modular reuse. However, achieving vertical reuse—integrating block-level PSS models into top-level ones—remains a significant challenge due to the manual effort required. This article introduces static analysis as an essential phase in automating vertical reuse. It applies data and control flow analyses combined with a Satisfiability Modulo Theories solver to trace signal paths from the top-level design to its submodules. Experimental validation demonstrates the applicability of the approach on the execution stage of a real-world RISC-V processor design. Its scalability and efficiency are further evaluated using a configurable benchmark with varying design sizes and hierarchy levels, while additional open-source designs are used to provide contextual support. The findings show that static analysis provides sufficient information about interconnections and dependencies in complex top-level designs to determine the connections necessary for automating the vertical reuse of PSS models.