Faculty of Information Technology, BUT

Course details

Advanced Digital Systems

PCS Acad. year 2014/2015 Winter semester 5 credits

Combinatorial and sequential logic design techniques, algorithms, and tools review. Review of digital design target technologies (ASIC, FPGA). Algorithms for minimization of digital circuits. Advanced synthesis techniques (pipelining, retiming). Constraint conditions. High-level synthesis (scheduling, allocation, binding). High-level synthesis (loop synthesis). Digital design using CatapultC environment (basic statements in C/C++). Digital design using CatapultC environment (loops, memory access). Low power design methodologies.
Reconfigurable computing. Verification of digital circuits (OVM methodology).

Guarantor

Language of instruction

Czech

Completion

Examination (written)

Time span

26 hrs lectures, 10 hrs pc labs, 16 hrs projects

Assessment points

60 exam, 18 half-term test, 10 labs, 12 projects

Department

Lecturer

Instructor

Dvořák Milan, Ing. (DCSY FIT BUT)
Kajan Michal, Ing. (DCSY FIT BUT)

Subject specific learning outcomes and competences

The students are able to design complex constrained digital systems using contemporary design techniques, high-level description language (C/C++) and professional CAD tools (CatapultC).

Learning objectives

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Prerequisite kwnowledge and skills

Digital system design, basic programming skills.

Study literature

  • Lecture notes in e-format

Fundamental literature

  • Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, ISBN 079239194-2, 1992
  • Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996

Syllabus of lectures

  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • High-level synthesis (scheduling, allocation, binding).
  • High-level synthesis (loop synthesis).
  • Digital design using CatapultC environment (basic statements in C/C++).
  • Digital design using CatapultC environment (loops, memory access).
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Syllabus - others, projects and individual work of students

  • Individual project focused on digital design using CatapultC environment.

Progress assessment

Written mid-term exam and project in due dates.

Exam prerequisites

Requirements for class accreditation are not defined.

Course inclusion in study plans

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