Faculty of Information Technology, BUT

Course details

Advanced Digital Systems

PCS Acad. year 2017/2018 Winter semester 5 credits

Current academic year

Combinatorial and sequential logic design techniques, algorithms, and tools review. Review of digital design target technologies (ASIC, FPGA). Algorithms for minimization of digital circuits. Advanced synthesis techniques (pipelining, retiming). Constraint conditions. Modern approaches to synthesis of digital circuits (models, methods, logic optimization, optimization for target technology). Synergy of modern syntehesis and verification. Low power design methodologies. Reconfigurable computing. Verification of digital circuits (OVM methodology).

Guarantor

Language of instruction

Czech

Completion

Examination (written)

Time span

26 hrs lectures, 10 hrs pc labs, 16 hrs projects

Assessment points

60 exam, 18 half-term test, 10 labs, 12 projects

Department

Lecturer

Instructor

Subject specific learning outcomes and competences

The students are able to design complex constrained digital systems using contemporary design techniques and they know modern methods for synthesis and verification of these systems.

Learning objectives

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Prerequisite kwnowledge and skills

Digital system design, basic programming skills.

Study literature

  • Lecture notes in e-format

Fundamental literature

  • Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, ISBN 079239194-2, 1992
  • Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996

Syllabus of lectures

  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • Models and methods for modern synthesis of digital circuits (AIG, BDD, SAT solvers).
  • Modern synthesis of digital circuits (logic optimization).
  • Modern synthesis of digital circuits (optimization for target technology).
  • Synergy between synthesis and verification of digital circuits.
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Syllabus - others, projects and individual work of students

  • Individual project focused on digital design using CatapultC environment.

Progress assessment

Written mid-term exam and project in due dates.

Controlled instruction

Presence in any form of instruction is not compulsory. An absence (and hence loss of points) can be compensated in the following ways: 
  1. presence in another laboratory group dealing with the same task. 
  2. showing a summary of results to the tutor at the next lab. 
  3. sending a short report (summarizing the results of the missed lab and answering the questions from the assignment) to the tutor, in 14 days after the missed lab.

Exam prerequisites

Requirements for class accreditation are not defined.

Course inclusion in study plans

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