Faculty of Information Technology, BUT

Course details

Digital Systems Design

INC Acad. year 2018/2019 Summer semester 5 credits

Current academic year

Binary number system: positional notation, conversion of base, binary codes, binary arithmetic. Boolean algebra, logic functions and their representations: logic expressions, reduction methods, design of combinatorial logic networks. Analysis of logic networks behaviour: signal races, hazards. Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit. Simple asynchronous networks: design and analysis of behaviour. Sequential logic networks, latches and flip-flops. State machines and their representations. Design of synchronized sequential networks: state coding, optimization and implementation. Register, counter, shift register, impulse divider. Design of simple digital equipment: design CAD tools, description tools, design strategy. Integrated circuits families. Programmable logic devices. 

Guarantor

Deputy Guarantor

Language of instruction

Czech

Completion

Credit+Examination (written)

Time span

39 hrs lectures, 10 hrs exercises, 3 hrs projects

Assessment points

55 exam, 25 half-term test, 20 projects

Department

Lecturer

Instructor

Subject specific learning outcomes and competences

Fundamental knowledge of selected methods for description, analysis and design of combinatorial and sequential logic in digital systems. 

Learning objectives

The goal is to obtain fundamental knowledge of methods for description, analysis, and design of combinatorial and sequential logic networks in digital systems.

Why is the course taught

Digital systems are the basis for computer architecture design. This course teaches the basic concepts of digital design as well as tools for the design of digital circuits and provides procedures suitable for a variety of digital systems.

Prerequisite kwnowledge and skills

The sets, relations and mappings. Basic terms and axioms of Boolean algebra. The elementary notions of the graph theory. Rudiments of electrical engineering phenomena and basic active and passive electronic elements.

Study literature

Fundamental literature

  • Harris, D., Harris, S.: Digital Design and Computer Architecture 2nd Edition, Morgan Kaufmann, eBook ISBN: 9780123978165, paperback ISBN: 9780123944245, 2012.
  • Wakerly, J. F.: Digital Design: Principles and Practices (4th Edition, Book only) 4th Edition, PEARSON, ISBN: 9788131713662, 8131713660, Edition: 4th Edition, 2008.
  • Mano, M. M. R, Ciletti, D.: Digital Design (4th Edition), Prentice-Hall, ISBN:0131989243, 2006.

Syllabus of lectures

  • Binary number system: positional notation, conversion of base, binary codes, binary arithmetic.
  • Boolean algebra, logic functions and their representations, logic expressions.
  • Reduction methods: Karnaugh maps, Qiune-McCluskey tabular method, Petrick's cover function.
  • Logic and functional diagrams. Analysis of logic networks behaviour: signal races, hazards.
  • Combinational logic: multiplexer, demultiplexer, decoder, coder.
  • Combinational logic: comparator, adder, subtractor, arithmetic and logic unit.
  • State machines and their representations. Latches and flip-flops.
  • Synchronized sequential networks: state coding, optimization and implementation.
  • Sequential logic: Registers, counters, shift registers, frequency dividers.
  • VHDL language, logic circuits synthesis.
  • Design of simple digital circuits: CAD tools, design methodology, FITkit.
  • Programmable logic devices.
  • Integrated circuits families.

Syllabus of numerical exercises

  • Binary number system: positional notation, conversion of base, binary codes, binary arithmetic.
  • Boolean algebra, logic functions and their representations, a behaviour analysis of contact-switch networks.
  • Logic expressions. Qiune-McCluskey tabular reduction method, Petrick's cover function.
  • Reduction methods: Karnaugh maps, logic and functional diagrams.
  • Logic functions implementation using logic components.
  • Selected logic modules: multiplexer, demultiplexer, encoder, decoder, adder, ALU.
  • State machines and their representations. Design of synchronized sequential networks.
  • Design of logic networks using programmable logic devices.

Syllabus of computer exercises

  • Introduction to a CAD software. Modelling of demo examples.
  • Modelling of personally designed logic networks.

Syllabus - others, projects and individual work of students

  • Three-hour project.

Progress assessment

Standard students in Czech Programme:
1) Mid-term exam: 25 points.
2) Homework and its evaluation in PC laboratory: 20 points.
3) Final exam: 55 points.
Passing boundary for ECTS assessment: 50 points.

International students:
1) Test: 20 points.
2) Mid-term exam: 20 points.
3) Final exam: 60 points.
Passing boundary for ECTS assessment: 50 points.

Controlled instruction

The knowledge of students is examined by the mid-exam (25 points), the project (20 pints) and by the final exam. The minimal number of points, which can be obtained from the final exam, is 25 (of 55 points). Otherwise, no points will be assigned to a student. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.

Exam prerequisites

For receiving the credit and thus for entering the exam, students have to obtain at least five points from the project. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action may be initiated.

Course inclusion in study plans

  • Programme BIT, 1st year of study, Compulsory
  • Programme IT-BC-3, field BIT, 1st year of study, Compulsory
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