Course details

# Logic Systems

LOS Acad. year 2004/2005 Winter semester 5 credits

Guarantor

Language of instruction

Completion

Time span

Assessment points

Department

Lecturer

Instructor

Subject specific learning outcomes and competences

Learning objectives

Study literature

- Amaral, J.N.: COMPUTER ORGANIZATION AND ARCHITECTURE I. University of Alberta, Edmonton, CA, 2003.
- Amaral, J.N.: COMPUTER ORGANIZATION AND ARCHITECTURE II. University of Alberta, Edmonton, CA, 2003.
- Eysselt, M.: Logic Systems: Basic Set of Problems 1
*(SSI Circuits Networks).*Textbook of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, Edited 1997, 1998. - Eysselt, M.: Logic Systems: Basic Set of Problems 2
*(MSI Circuits Networks).*Textbook of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, 1997. - Eysselt, M.: Logic Systems: Binary Logic Elements
*(Grafic Symbols for Diagrams).*Textbook the of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, Edited 1997, 1998. - Eysselt, M.: Logic Systems: Laboratory. Textbook of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, Edited 1997, 1998.
- Eysselt, M.: Logic Systems: Slides'97
*(A Set of Basic Slides).*Textbook of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, 1997 (updates: 1998, 1999, 2000, 2001). - Eysselt, M.: Programmable Logic Devices
*(Foundations & Examples).*Textbook of the FEECS-Brno_UT, DCSE-FEECS-Brno_UT, 1997. Here is a**WWW version**, 2nd Edition, from Dec. 2002.

Fundamental literature

- McCluskey, E.J.: LOGIC DESIGN PRICIPLES. Prentice-Hall, USA, ISBN 0-13-539768-5, 1986.
- Cheung, J.Y. - Bredeson, J.G.: MODERN DIGITAL SYSTEMS DESIGN. West Publishing Company, USA, ISBN 0-314-47828-0, 1990.
- Bolton, M.: Digital Systems Design with Programmable Logic. Addison-Wesley Publishing Company, Cornwall, GB, ISBN 0-201-14545-6, 1990.
- Katz, R.H.: Contemporary Logic Design. Addison-Wesley/Benjamin-Cummings Publishing CO, Redwood City, CA, USA, ISBN 0-8053-2703-7, 1993.
- Sasao, T.: SWITCHING THEORY FOR LOGIC SYNTHESIS. Kluwer Academic Publishers, Boston, USA, ISBN 0-7923-8456-3, 1999.
- Wakerly, J.F.: Digital Design Principles and Practices. Prentice Hall, USA, ISBN 0-13-055520-7, 2000.
- Maurer, P.M.: Logic Design. University of South Florida, WWW Edition.
- Bout, D.V.: Pragmatic Logic Design With Xilinx Foundation 2.1i. XESS Corporation, WWW Edition.

Syllabus of lectures

- Introduction, Boolean algebra, logic variables, logic functions.
- Logic elements, logic gates, logic networks. Models of logic functions: expression, table, Venn diagram, n-cube, map, block, logic and functional diagram, graph. Combinative and sequential behaviours. Huffman diagram.

Basic electrical parameters and characteristics of logic elements. - Logic expressions: sum-of-products, product-of-sums, mixed forms.
- Quine-McCluskey tabular reduction technique, a covering technique by Petrick.
- Logic maps minimization technique. Networks with NOT, AND and OR elements. Static and dynamic hazards. Design of hazardless networks.
- TANT (
hree-Stage**T**ND-**A**OT Gate Network with**N**rue Inputs) and TONT (**T**hree-Stage**T**R-**O**OT Gate Network with**N**rue Inputs) networks.**T** - Adders: half, full, serial, parallel, serial-parallel, decimal. Subtractor. Multiplier.
- MSI and LSI (VLSI) blocks: MX, DC/DMX, ROM, GA, PLA, PAL, PLD. Design of simple networks with MSI blocks.
- Finite state machines (Mealy machine, Moore machine): representation in table, expression, map, state diagram, logic diagram.
- Flip-flops and latches: D, T, R-S, R, S, J-K. R-S latches based on NANDs, and NORs. Edge-triggered flip-flops. Master-slave flip-flops.
- Synchronous sequential networks based on flip-flops.
- Registers, counters, shift registers.
- Microprogramming: an analysis of a controlled algorithm.
- Simple fixed control units. Simple microprogrammed control units.
- Simple asynchronous sequential networks.

Syllabus of numerical exercises

- Boolean algebra, logic functions and their representations, a behaviour analysis of contact switch networks.
- Logic expressions. Qiune-McCluskey tabular reduction method, Petrick cover function.
- Reduction methods: Karnaugh maps, logic and functional diagrams.
- Logic functions implementation using SSI i.cs.
- Behaviour analysis of logic networks: signal races, hazards.
- Selected logic modules: adders, subtractor.
- State machines and their representations. Design of synchronized sequential networks.
- Design of logic networks based on MSI and LSI i.cs. Programmable logic devices (PLD): gate arrays, PROM, PLA, PAL.

Syllabus - others, projects and individual work of students

- Design of a combinational network.
- Design of a synchronized sequential network.

Progress assessment

Controlled instruction

*(supported by the homework),*and final exam are monitored education parts.

**Test**,

**mid**-

**term exam**and

**laboratory practice**

*(supported by the homework)*

**are without alternative**. Points for homework may be obtained at the last laboratory class after successful modelling of all laboratory statements.

**Final exam has one additional alternative**.

Exam prerequisites