Faculty of Information Technology, BUT

Course details

Advanced Digital Systems

PCS Acad. year 2012/2013 Winter semester 5 credits

Overview of techniques, algorithms and technologies for digital design.  Methods for synthesis of digital circuits, minimization, espresso. Advanced synthesis methods, pipelining, retiming. ASIC and FPGA design methodology. Application of constrains. Synthesis with respect to required frequency, input/output delay, asynchronous clock domains. High level synthesis. Representation of algorithms in form of CDFG, process of scheduling, allocation, binding and RTL generation. Loop synthesis, techniques for loop unroling and pipelining. Specification of digital circuits using C/C++. Catapult C synthesis tool. Reconfigurable computing. Verification of digital circuits (OVM methodology). Low power design techniques.

Guarantor

Language of instruction

Czech

Completion

Examination (written)

Time span

26 hrs lectures, 10 hrs pc labs, 16 hrs projects

Assessment points

60 exam, 18 half-term test, 10 labs, 12 projects

Department

Lecturer

Instructor

Dvořák Milan, Ing. (DCSY FIT BUT)
Kajan Michal, Ing. (DCSY FIT BUT)

Subject specific learning outcomes and competences

The students are able to design complex constrained digital systems using contemporary design techniques, hardware description language VHDL, C/C++, and professional CAD tools.

Learning objectives

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Prerequisite kwnowledge and skills

Digital system design, basic programming skills.

Study literature

  • Lecture notes in e-format

Fundamental literature

  • Gajsky D., Dutt N., Wu A., Lin S.: High-Level Synthesis: Introduction to Chip and System Design, Springer, ISBN 079239194-2, 1992
  • Coussy P., Morawiec A.: High-Level Synthesis from Algorithm to Digital Circuit, Springer, ISBN 978-1402085871, 2008
  • Fingeroff M.: High-Level Synthesis Blue Book, Xlibris Corporation, ISBN 978-1450097246, 2010
  • Glasser M.: Open Verification Methodology Cookbook, Springer, New York, ISBN 978-1-4419-0967-1, 2009
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Springer, ISBN 978-0792396307, 1995

Syllabus of lectures

  • Overview of techniques, algorithms and technologies for digital design.
  • Methods for synthesis of digital circuits, minimization, espresso.
  • Advanced synthesis methods, pipelining, retiming.
  • ASIC and FPGA design methodology.
  • Application of constrains. Synthesis with respect to required frequency, input/output delay, asynchronous clock domains.
  • High level synthesis. Representation of algorithms in form of CDFG, process of scheduling, allocation, binding and RTL generation.
  • Loop synthesis, techniques for loop unroling and pipelining.
  • Specification of digital circuits using C/C++. Catapult C synthesis tool.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology)
  • Low power design techniques.

Syllabus - others, projects and individual work of students

  • Individual project, study of literature.

Progress assessment

Written mid-term exam, submitted 5 PC lab reports and project in due dates.

Exam prerequisites

Requirements for class accreditation are not defined.

Course inclusion in study plans

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