Thesis Details
Generátor aritmetických obvodů
The goal of this thesis is to design and implement a tool that would be able to generate a description of various types of arithmetic circuits, such as adders and multipliers, that are involved in more complex systems (filters, transformations, etc.).The first part of the thesis deals with analysis of different types of adders and multipliers on either theoretical or practical level. In the second part there is a description of the design and implementation of the tool created in Python language. On base of parameters, the tool is able to generate hierarchical or flattened description of various circuits in formats aimed for visualization, simulation and validation. In the end, the tool is used to compare different designs of adders and multipliers.
gate, arithmetic circuit, adder, multiplier, generator, Python, C, SpiceVision
Grézl František, Ing., Ph.D. (DCGM FIT BUT), člen
Hrubý Martin, Ing., Ph.D. (DITS FIT BUT), člen
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Švéda Miroslav, prof. Ing., CSc. (DIFS FIT BUT), člen
@bachelorsthesis{FITBT15869, author = "Michal Bolje\v{s}ik", type = "Bachelor's thesis", title = "Gener\'{a}tor aritmetick\'{y}ch obvod\r{u}", school = "Brno University of Technology, Faculty of Information Technology", year = 2015, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/15869/" }