Thesis Details
Vytvoření modelů procesorů pomocí ADL jazyka
Goal of this bachelor thesis is to create instruction level models of two processors Tensilica Xtensa and Sparc Leon. Models were implemented in CodAL language. Development, simulation and testing took place in Codasip Studio, an IDE developed by Codasip company.
Application Specific Instruction-Set Processors can be implemented from scratch or already implemented processor can be modified to meet needs of specific aplication. My models will be added to portfolio of Codasip company to be used and modified by the user of Codasip Studio.
Result of this work are tested models of these two processors. Simulator, assembler and C language compiler of these processors can be generated. Models were compared by several Benchmark tests and results were analyzed.
Processor, ADL, Codasip, Xtensa, Sparc, modeling, simulation, CodAL
Grézl František, Ing., Ph.D. (DCGM FIT BUT), člen
Hrubý Martin, Ing., Ph.D. (DITS FIT BUT), člen
Jaroš Jiří, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Švéda Miroslav, prof. Ing., CSc. (DIFS FIT BUT), člen
@bachelorsthesis{FITBT17842, author = "Dominik Steinhauser", type = "Bachelor's thesis", title = "Vytvo\v{r}en\'{i} model\r{u} procesor\r{u} pomoc\'{i} ADL jazyka", school = "Brno University of Technology, Faculty of Information Technology", year = 2015, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/17842/" }