Thesis Details

Implementace obecného zpětného assembleru

Master's Thesis Student: Přikryl Zdeněk Academic Year: 2006/2007 Supervisor: Lukáš Roman, Ing., Ph.D.
English title
Implementation of General Disassembler
Language
Czech
Abstract

This thesis presents the process of creating disassembler for new designed processors. We demand automatic generation of the disassembler. Instruction set for processor is modeled by specialized language ISAC, which offers resources for description of the instruction set. For example it describes format of instruction in the assembly language or format of instruction in the binary form or behavior of this instruction. Internal model is coupled finite automata, which describes relation of textual form of the instruction and binary form of the instruction in formal way. The code of disassembler is generated from the internal model. This disassembler accepts program in binary code at the input and generate equivalent program in assembly language at the output.

Keywords

Finite automata, coupled finite automata, assembler, disassembler, simulation, languages for specification processors, embedded systems.

Department
Department of Information Systems FIT BUT
Degree Programme
Information Technology, Field of Study Information Systems
Files
Status
defended, grade A
Date
21 June 2007
Reviewer
Masařík Karel, Ing., Ph.D.
Committee
Češka Milan, prof. RNDr., CSc. (DITS FIT BUT), předseda
Ryšavý Ondřej, doc. Ing., Ph.D. (DIFS FIT BUT), člen
Sumec Stanislav, Ing., Ph.D. (DCGM FIT BUT), člen
Šafařík Jiří, prof. Ing., CSc. (WBU in Pilsen), člen
Zbořil František, doc. Ing., Ph.D. (DITS FIT BUT), člen
Zendulka Jaroslav, doc. Ing., CSc. (DIFS FIT BUT), člen
Citation
PŘIKRYL, Zdeněk. Implementace obecného zpětného assembleru. Brno, 2007. Master's Thesis. Brno University of Technology, Faculty of Information Technology. 2007-06-21. Supervised by Lukáš Roman. Available from: https://www.fit.vut.cz/study/thesis/4816/
BibTeX 
@mastersthesis{FITMT4816,
    author = "Zden\v{e}k P\v{r}ikryl",
    type = "Master's thesis",
    title = "Implementace obecn\'{e}ho zp\v{e}tn\'{e}ho assembleru",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2007,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/4816/"
}

Theses

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