Thesis Details

Simulátor železničního stavědla

Bachelor's Thesis Student: Hovorka Bedřich Academic Year: 2006/2007 Supervisor: Martinek David, Ing.
English title
Simulator of Railway Interlocking
Language
Czech
Abstract

Railway interlocking is a dispatching facility for traffic control. The dispatcher controls train paths by setting switches and signals.In this thesis, I describe the design and implementation of a simple simulator of the facility in the Java language. I have studied functions of this facility.I interested with structure of whole application. And I implemented behaviour of foundamental elements.

Keywords

railway interlocking, combined simulation, XML, Java, OOP

Department
Degree Programme
Information Technology
Files
Status
defended, grade C
Date
12 June 2007
Reviewer
Committee
Meduna Alexander, prof. RNDr., CSc. (DIFS FIT BUT), předseda
Herout Pavel, doc. Ing., Ph.D. (WBU in Pilsen), člen
Lukáš Roman, Ing., Ph.D. (DIFS FIT BUT), člen
Růžička Richard, doc. Ing., Ph.D., MBA (DCSY FIT BUT), člen
Strnadel Josef, Ing., Ph.D. (DCSY FIT BUT), člen
Zbořil František, doc. Ing., Ph.D. (DITS FIT BUT), člen
Citation
HOVORKA, Bedřich. Simulátor železničního stavědla. Brno, 2007. Bachelor's Thesis. Brno University of Technology, Faculty of Information Technology. 2007-06-12. Supervised by Martinek David. Available from: https://www.fit.vut.cz/study/thesis/4944/
BibTeX
@bachelorsthesis{FITBT4944,
    author = "Bed\v{r}ich Hovorka",
    type = "Bachelor's thesis",
    title = "Simul\'{a}tor \v{z}elezni\v{c}n\'{i}ho stav\v{e}dla",
    school = "Brno University of Technology, Faculty of Information Technology",
    year = 2007,
    location = "Brno, CZ",
    language = "czech",
    url = "https://www.fit.vut.cz/study/thesis/4944/"
}
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