Thesis Details
Zpracování obrazu v FPGA
This bachelor's thesis presents a hardware realization of graphic algorithm for rendering objects described with 3D point clouds - a spatial objects representation. An FPGA (Field-Programmable Gate Array) chip coupled with a DSP (Digital Signal Processor) creates basement for implementation of function units. Is possible to decrease overall computation time by using more than one of that pair. That mean so simple distribution of load is used. The input graphical data is 3D point clouds - sets of points which are transformed into oriented circles just for purpose of rendering. Result of projection of that elements are ellipses. Such graphical representation seems to be more suitable for many purposes than the most commonly used triangle meshes. The implementation equivalent to concept is described too.
point clouds, rendering, FPGA, hardware acceleration, parallel processing
Herout Adam, prof. Ing., Ph.D. (DCGM FIT BUT), člen
Herout Pavel, doc. Ing., Ph.D. (WBU in Pilsen), člen
Lukáš Roman, Ing., Ph.D. (DIFS FIT BUT), člen
Martinek David, Ing. (DIFS FIT BUT), člen
Zbořil František V., doc. Ing., CSc. (DITS FIT BUT), člen
@bachelorsthesis{FITBT6122, author = "Luk\'{a}\v{s} Mar\v{s}\'{i}k", type = "Bachelor's thesis", title = "Zpracov\'{a}n\'{i} obrazu v FPGA", school = "Brno University of Technology, Faculty of Information Technology", year = 2008, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/6122/" }