Thesis Details

Hardwarové předzpracování paketů pro urychlení síťových aplikací

Semestral project Student: Vondruška Lukáš Academic Year: 2007/2008 Supervisor: Tobola Jiří, Ing.
English title
Hardware Packet Preprocessing for Acceleration of Network Applications
Language
Czech
Abstract

This thesis deals with design and implementation of FPGA accelerator, which performs hardware preprocessing on network pakets and accelerates resulting software analysis. Purpose of this thesis is to utilize generic platform called NetCOPE for rapid development of network applications. Within term project, is proposed analysis of packet classification and preprocessing and description of NetCOPE platform.

Keywords

NetCOPE, FPGA, HFE, packet analysis and preprocessing, COMBO

Department
Degree Programme
Status
defended
Date
9 January 2008
Citation
VONDRUŠKA, Lukáš. Hardwarové předzpracování paketů pro urychlení síťových aplikací. Brno, 2008. Semestral project. Brno University of Technology, Faculty of Information Technology. 2008-01-09. Supervised by Tobola Jiří. Available from: https://www.fit.vut.cz/study/thesis/6844/
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