Faculty of Information Technology, BUT

Publication Details

Scalable Construction of Approximate Multipliers with Formally Guaranteed Worst-Case Error

MRÁZEK Vojtěch, VAŠÍČEK Zdeněk, SEKANINA Lukáš, JIANG Honglan and HAN Jie. Scalable Construction of Approximate Multipliers with Formally Guaranteed Worst-Case Error. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, pp. 2572-2576. ISSN 1063-8210.
Czech title
Škálovatelná konstrukce aproximativních násobiček s formálně garantovanou maximální chybou
Type
journal article
Language
english
Authors
Mrázek Vojtěch, Ing., Ph.D. (DCSY FIT BUT)
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY FIT BUT)
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY FIT BUT)
Jiang Honglan (UALBERTA)
Han Jie, Dr. (UALBERTA)
Keywords
Approximate computing circuits and systems, circuit synthesis, circuits, computers and information processing
Abstract
Approximate computing exploits the fact that many applications are inherently error resilient. In order to reduce power consumption, approximate circuits such as multipliers have been employed in these applications. However, most current approximate multipliers are based on ad-hoc circuit structures and, for automated circuit approximation methods, large efficient designs are difficult to find due to the increased search space. Moreover, existing design methods do not typically provide sufficient formal guarantees in terms of error if large approximate multipliers are constructed. To address these challenges, this brief introduces a general and efficient method for constructing large high-quality approximate multipliers with respect to the objectives formulated in terms of the power-delay product and a provable error bound. This is demonstrated by means of a comparative evaluation of approximate 16-bit multipliers constructed by the proposed method and other methods in the literature.
Published
2018
Pages
2572-2576
Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 11, ISSN 1063-8210
Publisher
IEEE Computer Society
DOI
10.1109/TVLSI.2018.2856362
BibTeX 
@ARTICLE{FITPUB11678,
   author = "Vojt\v{e}ch Mr\'{a}zek and Zden\v{e}k Va\v{s}\'{i}\v{c}ek and Luk\'{a}\v{s} Sekanina and Honglan Jiang and Jie Han",
   title = "Scalable Construction of Approximate Multipliers with Formally Guaranteed Worst-Case Error",
   pages = "2572--2576",
   journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
   volume = 26,
   number = 11,
   year = 2018,
   ISSN = "1063-8210",
   doi = "10.1109/TVLSI.2018.2856362",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11678"
}
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