Result Details

New Methods for Synthesis and Approximation of Logic Circuits

VAŠÍČEK, Z. New Methods for Synthesis and Approximation of Logic Circuits. Brno: 2016. 194 p.

Type

habilitation thesis

Language

English

Authors

Vašíček Zdeněk, doc. Ing., Ph.D., DCSY (FIT)

Published

2016

Pages

194

Place

Brno

BibTeX

@misc{BUT168627,
  author="Zdeněk {Vašíček}",
  title="New Methods for Synthesis and Approximation of Logic Circuits",
  year="2016",
  pages="194",
  address="Brno",
  url="https://www.fit.vut.cz/research/publication/11742/"
}

Files

pdf Habilitační práce 7 MB

Departments

Faculty of Information Technology (FIT)