Publication Details

Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks

MRÁZEK Vojtěch, SEKANINA Lukáš and VAŠÍČEK Zdeněk. Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks. In: 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems. Genoa: Institute of Electrical and Electronics Engineers, 2020, pp. 243-247. ISBN 978-1-7281-4922-6. Available from: https://arxiv.org/abs/2004.10483
Czech title
Využití knihoven aproximativních obvodů v návrhu akcelerátorů hlubokých neuronových sítí
Type
conference paper
Language
english
Authors
URL
Keywords

approximate circuit, genetic programming, convolutional neural network, hardware accelerator

Abstract

Approximate circuits have been developed to provide good tradeoffs between power consumption and quality of service in error resilient applications such as hardware accelerators of deep neural networks (DNN). In order to accelerate the approximate circuit design process and to support a fair benchmarking of circuit approximation methods, libraries of approximate circuits have been introduced. For example, EvoApprox8b contains hundreds of 8-bit approximate adders and multipliers. By means of genetic programming we generated an extended version of the library in which thousands of 8- to 128-bit approximate arithmetic circuits are included. These circuits form Pareto fronts with respect to several error metrics, power consumption and other circuit parameters. In our case study we show how a large set of approximate multipliers can be used to perform a resilience analysis of a hardware accelerator of ResNet DNN and to select the most suitable approximate multiplier for a given application. Results are reported for various instances of the ResNet DNN trained on CIFAR-10 benchmark problem. 

Published
2020
Pages
243-247
Proceedings
2nd IEEE International Conference on Artificial Intelligence Circuits and Systems
Conference
IEEE International Conference on Artificial Intelligence Circuits and Systems, Genoa, IT
ISBN
978-1-7281-4922-6
Publisher
Institute of Electrical and Electronics Engineers
Place
Genoa, IT
DOI
UT WoS
000720328700055
EID Scopus
BibTeX
@INPROCEEDINGS{FITPUB12082,
   author = "Vojt\v{e}ch Mr\'{a}zek and Luk\'{a}\v{s} Sekanina and Zden\v{e}k Va\v{s}\'{i}\v{c}ek",
   title = "Using Libraries of Approximate Circuits in Design of Hardware Accelerators of Deep Neural Networks",
   pages = "243--247",
   booktitle = "2nd IEEE International Conference on Artificial Intelligence Circuits and Systems",
   year = 2020,
   location = "Genoa, IT",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "978-1-7281-4922-6",
   doi = "10.1109/AICAS48895.2020.9073837",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/12082"
}
Back to top