Faculty of Information Technology, BUT

Publication Details

Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA

STRAKA Martin, KAŠTIL Jan and KOTÁSEK Zdeněk. Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA. In: NORCHIP 2010. Tampere: IEEE Computer Society, 2010, pp. 1-4. ISBN 978-1-4244-8971-8.
Czech title
Generický řadič částečné dynamické rekonfigurace pro systémy odolné proti poruchám implementované v FPGA
Type
conference paper
Language
english
Authors
Keywords
FPGA, partial reconfiguration, controller, fault tolerant system, architecture
Abstract
In recent years, many techniques for self repairing of the systems implemented in FPGA were developed and presented. The basic problem of these approaches is bigger overhead of unit for controlling of the partial reconfiguration process. Moreover, these solutions generally are not implemented as fault tolerant system. In this paper, a small and flexible generic partial dynamic reconfiguration controller implemented inside FPGA is presented. The basic architecture and usage of the controller in the FPGA-based fault tolerant structure are described. The implementation of controller as fault tolerant component is described as well. The basic features and synthesis results of controller for Xilinx FPGA and comparison with MicroBlaze solution are presented.
Annotation
In recent years, many techniques for self repairing of the systems implemented in FPGA were developed and presented. The basic problem of these approaches is bigger overhead of unit for controlling of the partial reconfiguration process. Moreover, these solutions generally are not implemented as fault tolerant system. In this paper, a small and flexible generic partial dynamic reconfiguration controller implemented inside FPGA is presented. The basic architecture and usage of the controller in the FPGA-based fault tolerant structure are described. The implementation of controller as fault tolerant component is described as well. The basic features and synthesis results of controller for Xilinx FPGA and comparison with MicroBlaze solution are presented.
Published
2010
Pages
1-4
Proceedings
NORCHIP 2010
Conference
NORCHIP conference 2010, Tampere, FI
ISBN
978-1-4244-8971-8
Publisher
IEEE Computer Society
Place
Tampere, FI
BibTeX
@INPROCEEDINGS{FITPUB9353,
   author = "Martin Straka and Jan Ka\v{s}til and Zden\v{e}k Kot\'{a}sek",
   title = "Generic Partial Dynamic Reconfiguration Controller for Fault Tolerant Designs Based on FPGA",
   pages = "1--4",
   booktitle = "NORCHIP 2010",
   year = 2010,
   location = "Tampere, FI",
   publisher = "IEEE Computer Society",
   ISBN = "978-1-4244-8971-8",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/9353"
}
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