Result Details

Development of Building Blocks for Polymorphic Digital Circuits

RŮŽIČKA, R.; STAREČEK, L. Development of Building Blocks for Polymorphic Digital Circuits. Proceedings of the Work in Progress Session of 10th Euromicro DSD 2007. Linz: Johannes Kepler University Linz, 2007. p. 33-34. ISBN: 978-3-902457-16-5.
Type
conference paper
Language
English
Authors
Růžička Richard, doc. Ing., Ph.D., MBA, DCSY (FIT)
Stareček Lukáš, Ing., Ph.D., DCSY (FIT)
Abstract

Polymorphic digital circuits are circuits composed of polymorphic (multifunctional) as well as ordinary gates. In addition to its standard logic function, a polymorphic gate exhibits another logic function which is activated under a specific condition, for example, when Vdd, temperature, illumination or a special signal reaches a certain level. In the recent years, several polymorphic gates have been discovered. These gates are designed using evolutionary approach and have some disadvantages what makes their application difficult. The paper refers about the effort to develop a set of polymorphic gates which eliminates main disadvantages of existing gates.

Keywords

polymorphic gates, polymorphic electronics, polymorphic digital circuits

Published
2007
Pages
33–34
Proceedings
Proceedings of the Work in Progress Session of 10th Euromicro DSD 2007
Conference
10th EUROMICRO Conference on Digital System Design
ISBN
978-3-902457-16-5
Publisher
Johannes Kepler University Linz
Place
Linz
BibTeX 
@inproceedings{BUT28842,
  author="Richard {Růžička} and Lukáš {Stareček}",
  title="Development of Building Blocks for Polymorphic Digital Circuits",
  booktitle="Proceedings of the Work in Progress Session of 10th Euromicro DSD 2007",
  year="2007",
  pages="33--34",
  publisher="Johannes Kepler University Linz",
  address="Linz",
  isbn="978-3-902457-16-5"
}
Projects
Methods of polymorphic digital circuit design, GACR, Standardní projekty, GA102/06/0599, start: 2006-01-01, end: 2008-12-31, completed
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
Research groups
Evolvable Hardware Research Group (RG EHW)
Departments
Department of Computer Systems (DCSY)
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