Course details
Advanced Digital Systems
Guarantor
Language of instruction
Completion
Time span
- 26 hrs lectures
- 10 hrs pc labs
- 16 hrs projects
Department
Study literature
- Přednáškové materiály v elektronické podobě.
- Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996
Fundamental literature
- Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008
Syllabus of lectures
- Combinational and sequential logic design techniques, algorithms, and tools review.
- Structured design concept. Design strategies. Design decomposition. Design tools.
- Introduction to VHDL
- Basic features of VHDL. Simulation and synthesis.
- Basic VHDL modeling techniques.
- Algorithmic level design.
- Register Level Design.
- HDL-based design techniques. Constrained design.
- ASIC and PLD design process. Fast prototyping.
- Modeling for synthesis.
- Top-down design methodology in VHDL.
- Design case study.
- Design automation algorithms. HW/SW co-design.
Syllabus of computer exercises
- Design, schematic diagram drawing, and simulation of a 4-bit full ripple-carry adder.
- Combinational logic circuits modeling and simulation using VHDL.
- Sequential logic circuits modeling and simulation using VHDL.
- A 16-bit, in VHDL described, sequential multiplier modeling, simulation, and implementation.
Course inclusion in study plans
- Programme IT-MGR-2, field MBI, 2nd year of study, Compulsory-Elective
- Programme IT-MGR-2, field MBS, MIN, MIS, MMM, MPS, MSK, any year of study, Elective
- Programme IT-MGR-2, field MGM, any year of study, Compulsory-Elective
- Programme IT-MGR-2, field MMI, 1st year of study, Compulsory-Elective
- Programme IT-MGR-2, field MPV, 2nd year of study, Compulsory