Digital Systems Design

• 39 hrs lectures
• 10 hrs exercises
• 3 hrs projects

Fundamental knowledge of selected methods for description, analysis and design of combinatorial and sequential logic in digital systems. 

The goal is to obtain fundamental knowledge of methods for description, analysis, and design of combinatorial and sequential logic networks in digital systems.

The sets, relations and mappings. Basic terms and axioms of Boolean algebra. The elementary notions of the graph theory. Rudiments of electrical engineering phenomena and basic active and passive electronic elements.

• Eysselt, M.: Logické systémy. Studijní opora, Učební text VUT Brno, vydáno 1980, 1985, 1990. Rozebráno: Lze si zapůjčovat v knihovnách v Brně, i na FIT.
• Frištacký, N., Kolesár, M., Kolenička, J., Hlavatý, J.: Logické systémy. SNTL Praha, ALFA Bratislava, 1986.
• Maurer, P.M.: Logic Design. University of South Florida, WWW vydání.
• Bout, D.V.: Pragmatic Logic Design With Xilinx Foundation 2.1i. XESS Corporation, WWW vydání.
• Bolton, M.: Digital Systems Design with Programmable Logic. Addison-Wesley Publishing Company, Cornwall, GB, ISBN 0-201-14545-6, 1990.
• McCluskey, E.J.: LOGIC DESIGN PRICIPLES. Prentice-Hall, USA, ISBN 0-13-539768-5, 1986.
• Cheung, J.Y. - Bredeson, J.G.: MODERN DIGITAL SYSTEMS DESIGN. West Publishing Company, USA, ISBN 0-314-47828-0, 1990.
• Sasao, T.: SWITCHING THEORY FOR LOGIC SYNTHESIS. Kluwer Academic Publishers, Boston, USA, ISBN 0-7923-8456-3, 1999.
• Eysselt, M.: Vybrané příklady podporující návrh číslicových systémů. Studijní opora, Učební text, FIT, 2002, 38 str. Tento text zapůjčuje autor ke kopírování. Zde je WWW verze přístupná evidovaným studentům.
• Eysselt, M.: Logická a funkční schémata, výňatek z oborové normy ONT345553. Studijní opora, Učební text, FIT, 2002, 30 str. Tento text zapůjčuje autor ke kopírování. Zde je WWW verze přístupná evidovaným studentům.
• Eysselt. M.: Funkční značky integrovaných obvodů, kreslení spojů. Studijní opora, Učební text, FIT, 2002, 12 str. Tento učební text zapůjčuje autor ke kopírování. Zde je WWW verze přístupná evidovaným studentům.
• Eysselt, M.: Digital Systems Design: Programmable Logic Devices. Studijní opora, Učební text, FIT VUT v Brně, 2003. Zde je WWW verze přístupná evidovaným studentům.

• Harris, D., Harris, S.: Digital Design and Computer Architecture 2nd Edition, Morgan Kaufmann, eBook ISBN: 9780123978165, paperback ISBN: 9780123944245, 2012.
• Wakerly, J. F.: Digital Design: Principles and Practices (4th Edition, Book only) 4th Edition, PEARSON, ISBN: 9788131713662, 8131713660, Edition: 4th Edition, 2008.
• Mano, M. M. R, Ciletti, D.: Digital Design (4th Edition), Prentice-Hall, ISBN:0131989243, 2006.

• Binary number system: positional notation, conversion of base, binary codes, binary arithmetic.
• Boolean algebra, logic functions and their representations, logic expressions.
• Reduction methods: Qiune-McCluskey tabular method, Petrick's cover function.
• Reduction methods: Karnaugh maps, logic and functional diagrams.
• Analysis of logic networks behaviour: signal races, hazards.
• Selected logic modules: adder, subtractor, multiplexer, demultiplexer, decoder, coder, comparator, arithmetic and logic unit.
• Simple asynchronous networks.
• Sequential logic networks, latches and flip-flops.
• State machines and their representations. Design of synchronized sequential networks: state coding, optimization and implementation. Register, counter, shift register, impulse divider.
• Design of simple digital equipment: CAD tools, description tools, design strategy.
• Integrated circuits families. Programmable logic devices.

• Binary number system: positional notation, conversion of base, binary codes, binary arithmetic.
• Boolean algebra, logic functions and their representations, a behaviour analysis of contact-switch networks.
• Logic expressions. Qiune-McCluskey tabular reduction method, Petrick's cover function.
• Reduction methods: Karnaugh maps, logic and functional diagrams.
• Logic functions implementation using logic components.
• Selected logic modules: multiplexer, demultiplexer, encoder, decoder, adder, ALU.
• State machines and their representations. Design of synchronized sequential networks.
• Design of logic networks using programmable logic devices.

For receiving the credit and thus for entering the exam, students have to obtain at least five points from the project. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action may be initiated.

The knowledge of students is examined by the mid-exam (20 points), the project (25 pints) and by the final exam. The minimal number of points, which can be obtained from the final exam, is 25 (of 55 points). Otherwise, no points will be assigned to a student. Plagiarism and not allowed cooperation will cause that involved students are not classified and disciplinary action can be initiated.