Course details

Advanced Digital Systems

PCS Acad. year 2014/2015 Winter semester 5 credits

Current academic year

Combinatorial and sequential logic design techniques, algorithms, and tools review. Review of digital design target technologies (ASIC, FPGA). Algorithms for minimization of digital circuits. Advanced synthesis techniques (pipelining, retiming). Constraint conditions. High-level synthesis (scheduling, allocation, binding). High-level synthesis (loop synthesis). Digital design using CatapultC environment (basic statements in C/C++). Digital design using CatapultC environment (loops, memory access). Low power design methodologies.
Reconfigurable computing. Verification of digital circuits (OVM methodology).

Guarantor

Fučík Otto, doc. Dr. Ing. (DCSY)

Language of instruction

Czech

Completion

Examination

Time span

Department

Department of Computer Systems (UPSY)

Subject specific learning outcomes and competences

The students are able to design complex constrained digital systems using contemporary design techniques, high-level description language (C/C++) and professional CAD tools (CatapultC).

Learning objectives

To give the students the knowledge of advanced digital systems design including hardware description languages, professional CAD tools, techniques for constrained design, and PLD technology.

Prerequisite knowledge and skills

Digital system design, basic programming skills.

Study literature

  • Přednáškové materiály v elektronické podobě.
  • Khatri S. P., Gulati K. (eds.): Advanced Techniques in Logic Synthesis, Optimizations and Applications, ISBN 978-1-4419-7517-1, 2011
  • Rabaey J., Pedram M.: Low Power Design Methodologies, Kluwer, ISBN 0792396308, 1996

Fundamental literature

  • Micheli G., High-Level Synthesis from Algorithm to Digital Circuit, ISBN 978-1-4020-8587-1, 2008

Syllabus of seminars

Syllabus of lectures:
  • Combinatorial and sequential logic design techniques, algorithms, and tools review.
  • Review of digital design target technologies (ASIC, FPGA).
  • Algorithms for minimization of digital circuits.
  • Advanced synthesis techniques (pipelining, retiming).
  • Constraint conditions.
  • High-level synthesis (scheduling, allocation, binding).
  • High-level synthesis (loop synthesis).
  • Digital design using CatapultC environment (basic statements in C/C++).
  • Digital design using CatapultC environment (loops, memory access).
  • Low power design methodologies.
  • Reconfigurable computing.
  • Verification of digital circuits (OVM methodology).

Syllabus of computer exercises:
  • Synthesis of the basic logic circuits, pipelining, retiming.
  • Constraint conditions.
  • Basic techniques for digital design using CatapultC environment.
  • Advanced techniques for digital design using CatapultC environment.
  • Verification of digital circuits.

Syllabus - others, projects and individual work of students:
  • Individual project focused on digital design using CatapultC environment.

Progress assessment

Study evaluation is based on marks obtained for specified items. Minimimum number of marks to pass is 50.

Requirements for class accreditation are not defined.

Controlled instruction

Written mid-term exam and project in due dates.

Course inclusion in study plans

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