Project Details

Hardware-Aware Machine Learning: From Automated Design to Innovative and Explainable Solutions

Project Period: 1. 1. 2024 – 31. 12. 2026

Project Type: grant

Code: GA24-10990S

Agency: Czech Science Foundation

Program: Standardní projekty

Czech title
Strojové učení zohledňující hardware: Od automatizovaného návrhu k inovativním a vysvětlitelným řešením
Type
grant
Keywords

evolutionary algorithm;approximate computing;deep neural network;machine learning;hardware accelerator;explainability;design automation;

Abstract

As machine learning (ML) technology penetrates embedded devices, a new class of design automation algorithms capable of generating hardware-aware implementations of ML algorithms is highly desired. In addition, a lot of effort is now invested in developing explainable ML. We hypothesize that the design time of hardware-aware implementations of ML systems showing additional properties (such as explainable behavior) can be substantially reduced if the used design automation algorithms employ suitable surrogate models for estimating the accuracy, hardware parameters, and other desired properties. In addition to developing suitable surrogate models, we will create a new method based on genetic programming for the automated design of highly-optimized ML models showing excellent trade-offs among the quality of service, hardware parameters, and explainability. The design method and ML models automatically generated by the method will be evaluated in case studies, including image classifiers, Parkinson's disease assessment, and command classifiers of brain signals.

Team members
Sekanina Lukáš, prof. Ing., Ph.D. (DCSY) – research leader
Drahošová Michaela, Ing., Ph.D. (DCSY)
Hurta Martin, Ing., Ph.D. (DCSY)
Malik Aamir Saeed, prof., Ph.D. (DCSY)
Mrázek Vojtěch, doc. Ing., Ph.D. (DCSY)
Piňos Michal, Ing. (DCSY)
Plevač Lukáš, Ing. (DCSY)
Vašíček Zdeněk, doc. Ing., Ph.D. (DCSY)
Zaheer Muhammad Asad (DCSY)
Publication Results

2026

  • HUSSAIN, Y.; ZAHEER, M.; KHAN, A.; MALIK, A. Depression detection using deep learning and large language models from multimodalities. Frontiers in Digital Health, 2026, vol. 8, iss. 8, p. 1-10. Detail
  • Muhammad Asad Zaheer Aamir Saeed Malik. Unveiling Neural Signatures: A Comprehensive Review of EEG Biomarkers in Stress, Anxiety, and Depression. IEEE Transactions on Affective Computing, 2026, vol. 17, iss. 1, p. 61-76. Detail

2025

  • HURTA, M.; OVESNÁ, A.; MRÁZEK, V.; SEKANINA, L. Multi-Objective Evolutionary Design of Explainable EEG Classifier. In Genetic Programming, 28th European Conference, EuroGP 2025. Lecture Notes in Computer Science. Terst: Springer Nature Switzerland AG, 2025. p. 52-67. ISBN: 978-3-031-89990-4. Detail
  • HUSSAIN, Y.; FATIMA, M.; MALIK, A. A Deep Learning Approach to EEG-Based Diagnosis of Cognitive Skills Impairment: Electrode-Level Analysis Insights. In 2025 IEEE 37th International Conference on Tools with Artificial Intelligence (ICTAI). Athens, Greece: IEEE, 2025. p. 1470-1475. ISBN: 979-8-3315-4919-0. Detail
  • HUSSAIN, Y.; SURAWEERA, S.; MALIK, A. Unraveling Cognitive Impairments in Mental and Neurological Disorders: A Biomarker-Based Mapping Framework. Neuroscience and Biobehavioral Reviews, 2025, vol. 180, iss. 106426, p. 0-0. Detail
  • MASÁR, F.; MRÁZEK, V.; SEKANINA, L. Late Breaking Result: FPGA-Based Emulation and Fault Injection for CNN Inference Accelerators. In 2025 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lyon: Institute of Electrical and Electronics Engineers, 2025. p. 1-2. ISBN: 978-3-9826741-0-0. Detail
  • MRÁZEK, V.; VAŠÍČEK, Z. AxMED: Formal Analysis and Automated Design of Approximate Median Filters using BDDs. In 2025 IEEE International Symposium on Circuits and Systems (ISCAS). London: Institute of Electrical and Electronics Engineers, 2025. p. 1-5. ISBN: 979-8-3503-5683-0. Detail
  • PIŇOS, M.; KLHŮFEK, J.; MRÁZEK, V.; SEKANINA, L. Inference Energy Analysis in Context of Hardware-Aware NAS. In 2025 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems. Lyon: Institute of Electrical and Electronics Engineers, 2025. p. 161-164. ISBN: 979-8-3315-2801-0. Detail
  • SEKANINA, L.; JŮZA, T. Genetic Programming with Memory for Approximate Data Reconstruction. In Genetic Programming Theory and Practice XXI. Singapore: Springer Nature Singapore, 2025. p. 199.ISBN: 978-981-9600-76-2. Detail
  • VLČEK, O.; MRÁZEK, V. ApproxGNN: A Pretrained GNN for Parameter Prediction in Design Space Exploration for Approximate Computing. In 2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD). Munich, Germany: IEEE, 2025. p. 1-8. ISBN: 979-8-3315-1560-7. Detail

2024

  • ARIF, M.; REHMAN, F.; SEKANINA, L.; MALIK, A. A comprehensive survey of evolutionary algorithms and metaheuristics in brain EEG-based applications. Journal of Neural Engineering, 2024, vol. 21, iss. 5, p. 1-25. ISSN: 1741-2552. Detail
  • JAWED, S.; FAYE, I.; MALIK, A. Deep learning-based assessment model for Real-time identification of visual learners using Raw EEG. IEEE TRANSACTIONS ON NEURAL SYSTEMS AND REHABILITATION ENGINEERING, 2024, vol. 32, iss. 1, p. 378-390. ISSN: 1558-0210. Detail
  • KLHŮFEK, J.; ŠAFÁŘ, M.; MRÁZEK, V.; VAŠÍČEK, Z.; SEKANINA, L. Exploiting Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators. In 2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS). Kielce: Institute of Electrical and Electronics Engineers, 2024. p. 1-6. ISBN: 979-8-3503-5934-3. Detail
  • PIŇOS, M.; SEKANINA, L.; MRÁZEK, V. ApproxDARTS: Differentiable Neural Architecture Search with Approximate Multipliers. In 2024 The International Joint Conference on Neural Networks (IJCNN). Yokohama: Institute of Electrical and Electronics Engineers, 2024. p. 1-8. ISBN: 979-8-3503-5931-2. Detail
  • SEKANINA, L. Tutorial: Evolutionary Design Methods in Electronic Design Automation. In IEEE 42nd International Conference on Computer Design (ICCD). Milano: IEEE Computer Society, 2024. p. 689-690. ISBN: 979-8-3503-8040-8. Detail
  • VAŠÍČEK, Z.; MRÁZEK, V.; SEKANINA, L. Automated Verifiability-Driven Design of Approximate Circuits: Exploiting Error Analysis. In 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE). Valencia: Institute of Electrical and Electronics Engineers, 2024. p. 1-6. ISBN: 979-8-3503-4859-0. Detail
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