Publication Details

Evolutionary Functional Approximation of Circuits Implemented into FPGAs

VAŠÍČEK Zdeněk, MRÁZEK Vojtěch and SEKANINA Lukáš. Evolutionary Functional Approximation of Circuits Implemented into FPGAs. In: 2016 IEEE Symposium Series on Computational Intelligence. Athens: Institute of Electrical and Electronics Engineers, 2016, pp. 1-8. ISBN 978-1-5090-4240-1.
Czech title
Funkční aproximace obvodů pro FPGA založená na evolučním algoritmu
Type
conference paper
Language
english
Authors
Keywords
functional approximation
evolutionary algorithm
equivalence
FPGA synthesis
Abstract
In many applications it is acceptable to allow a small error in the result if significant improvements are obtained in terms of performance, area or energy efficiency. Exploiting this principle is particularly important for FPGA-based solutions that are inherently subject to many resources- oriented constraints. This paper devises an automated method that enables to approximate circuit components which are often implemented in multiple instances in FPGA-based accelerators. The approximation process starts with a fully functional gate-level circuit, which is approximated by means of Cartesian Genetic Programming reflecting the error metric and constraints formulated by the user. The evolved circuits are then implemented for a particular FPGA by common FPGA synthesis and optimization tools. It is shown using five different FPGA tools, that the approximations obtained by CGP working at the gate level are preserved at the level look-up tables of FPGAs. The proposed method is evaluated in the task of 8-bit adder, 8-bit multiplier, 9-input median and 25-input median approximation. 
Published
2016
Pages
1-8
Proceedings
2016 IEEE Symposium Series on Computational Intelligence
Conference
IEEE Symposium Series on Computational Intelligence 2016, Athens, GR
ISBN
978-1-5090-4240-1
Publisher
Institute of Electrical and Electronics Engineers
Place
Athens, GR
DOI
BibTeX
@INPROCEEDINGS{FITPUB11243,
   author = "Zden\v{e}k Va\v{s}\'{i}\v{c}ek and Vojt\v{e}ch Mr\'{a}zek and Luk\'{a}\v{s} Sekanina",
   title = "Evolutionary Functional Approximation of Circuits Implemented into FPGAs",
   pages = "1--8",
   booktitle = "2016 IEEE Symposium Series on Computational Intelligence",
   year = 2016,
   location = "Athens, GR",
   publisher = "Institute of Electrical and Electronics Engineers",
   ISBN = "978-1-5090-4240-1",
   doi = "10.1109/SSCI.2016.7850173",
   language = "english",
   url = "https://www.fit.vut.cz/research/publication/11243"
}
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