Result Details

Usage of Decompilation in Processor Architecture Modeling

KŘOUSTEK, J. Usage of Decompilation in Processor Architecture Modeling. Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems. Ostrava: Marq software s.r.o., 2009. p. 64-67. ISBN: 978-80-86840-47-5.
Type
conference paper
Language
English
Authors
Křoustek Jakub, Ing., Ph.D., DIFS (FIT)
Abstract

This paper explains concept of generic decompiler and its use in processor architecture modeling. Generic decompiler is a tool that can recompile any binary form of program to a chosen high level language representation. Output must be functionally equivalent to the input. Process of decompilation is highly dependent on the processor architecture. This problem is solvable by a special language for description of architecture and instruction semantic. Generic decompiler will be the main part of the planned tool - generic debugger. Special case of usage of such a tool is debugging optimized code for VLIW architectures, due to their complexity. The whole concept will be implemented in practice in project Lissom (FIT BUT). The Lissom project is focused on hardware/software co-design. Generic debugger will be a part of automatically generated tool-set.

Keywords

reverse engineering, decompilation, debugging, Lissom, VLIW

Published
2009
Pages
64–67
Proceedings
Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems
Conference
31st International Autumn Colloquium Advanced Simulation of Systems - ASIS 2009
ISBN
978-80-86840-47-5
Publisher
Marq software s.r.o.
Place
Ostrava
BibTeX
@inproceedings{BUT33749,
  author="Jakub {Křoustek}",
  title="Usage of Decompilation in Processor Architecture Modeling",
  booktitle="Proceedings of XXXIth International Autumn Colloquium Advanced Simulation of Systems",
  year="2009",
  pages="64--67",
  publisher="Marq software s.r.o.",
  address="Ostrava",
  isbn="978-80-86840-47-5"
}
Projects
Language and development environment for microprocessor design, MPO, TANDEM, FT-TA3/128, start: 2006-01-01, end: 2010-06-30, completed
System for Programming and Realization of Embedded Systems, MPO, TIP, FR-TI1/038, start: 2009-07-01, end: 2013-06-30, completed
Research groups
Departments
Back to top