Result Details

RSD Analog-to-Digital Converter with 2,5-Bit Subconverter

SKOČDOPOLE, M., VRBA, R., FUJCIK, L., HÁZE, J. RSD Analog-to-Digital Converter with 2,5-Bit Subconverter. In 11th Electronic devices and systems conference 2004 - proceedings. Brno: Ing. Zdeněk Novotný, 2004. 3 p. ISBN: 80-214-2701-9.
Type
conference paper
Language
English
Authors
Skočdopole Michal, Ing., UMEL (FEEC)
Vrba Radimír, prof. Ing., CSc., UMEL (FEEC)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Háze Jiří, doc. Ing., Ph.D., UMEL (FEEC)
Abstract

RSD algorithm was implemented to cyclic or pipelined switched-current
analog-to-digital converter (ADC), where resolution of subconverter is
1,5 bit. This implementation is known. A novel implementation of RSD
algorithm into ADC with 2,5-bit subconverter is presented in this paper. The
most critical blocs in classical ADC are reference current sources and
comparators. Usage of this algorithm decreases inaccuracy of these blocks
impact on accuracy of full ADC.

Keywords

Analog-to-digital converter, ADC, RSD algorithm,
switched-current technique

Published
2004
Pages
3
Proceedings
11th Electronic devices and systems conference 2004 - proceedings
Conference
Electronic Devices and Systems Conference 2004
ISBN
80-214-2701-9
Publisher
Ing. Zdeněk Novotný
Place
Brno
BibTeX
@inproceedings{BUT12844,
  author="Michal {Skočdopole} and Radimír {Vrba} and Lukáš {Fujcik} and Jiří {Háze}",
  title="RSD Analog-to-Digital Converter with 2,5-Bit Subconverter",
  booktitle="11th Electronic devices and systems conference 2004 - proceedings",
  year="2004",
  pages="3",
  publisher="Ing. Zdeněk Novotný",
  address="Brno",
  isbn="80-214-2701-9"
}
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