Result Details
The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs
PODIVÍNSKÝ, J.; KOTÁSEK, Z. The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs. Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017. p. 81-82. ISBN: 978-80-01-06178-7.
Type
conference paper
Language
English
Authors
Podivínský Jakub, Ing., Ph.D., DCSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., DCSY (FIT), UTKO (FEEC)
Kotásek Zdeněk, doc. Ing., CSc., DCSY (FIT), UTKO (FEEC)
Abstract
The aim of this paper is to present a new platform for evaluating impact of faults on electro-mechanical systems based on SRAM-based FPGAs. Functional verification together with the fault injector serve as a tool for the fault tolerance evaluation. The article demonstrates the use of the verification environment for evaluating impacts of faults in electro-mechanical systems. Our system consists of mechanical robot and its electronic controller implemented into FPGA. The experimental results gained from the verification process are also presented and discussed in the paper.
Keywords
FPGA
functional verification
robot controller
fault tolerance
fault injection
Published
2017
Pages
81–82
Proceedings
Proceedings of the 5th Prague Embedded Systems Workshop
Conference
The 5th Prague Embedded Systems Workshop
ISBN
978-80-01-06178-7
Publisher
Faculty of Information Technology, Czech Technical University
Place
Roztoky u Prahy
BibTeX
@inproceedings{BUT144443,
author="Jakub {Podivínský} and Zdeněk {Kotásek}",
title="The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs",
booktitle="Proceedings of the 5th Prague Embedded Systems Workshop",
year="2017",
pages="81--82",
publisher="Faculty of Information Technology, Czech Technical University",
address="Roztoky u Prahy",
isbn="978-80-01-06178-7",
url="https://www.fit.vut.cz/research/publication/11452/"
}
Files
Projects
Algorithms, Design Methods, and Many-Core Execution Platform for Low-Power Massive Data-Rate Video and Image Processing, MŠMT, Společné technologické iniciativy, 7H14002, start: 2014-04-01, end: 2017-06-30, completed
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, start: 2016-01-01, end: 2020-12-31, completed
Pokročilé paralelní a vestavěné počítačové systémy, BUT, Vnitřní projekty VUT, FIT-S-17-3994, start: 2017-03-01, end: 2020-02-29, completed
IT4Innovations excellence in science, MŠMT, Národní program udržitelnosti II, LQ1602, start: 2016-01-01, end: 2020-12-31, completed
Pokročilé paralelní a vestavěné počítačové systémy, BUT, Vnitřní projekty VUT, FIT-S-17-3994, start: 2017-03-01, end: 2020-02-29, completed
Research groups
Dependable Digital Systems Research Group (RG DEPSYS)
Departments