Result Details

Method and an apparatus for automatic processor design and verification

Registered: 18 April 2014 Approved: 12 January 2016 Expiration: 18 April 2034
Type
patent
Language
English
Authors
Přikryl Zdeněk, Ing., Ph.D.
Husár Adam, Ing., Ph.D.
Masařík Karel, Ing., Ph.D.
Hruška Tomáš, prof. Ing., CSc., DIFS (FIT)
Description

see http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=9235669.PN.&OS=PN/9235669&RS=PN/9235669

Keywords

processor design, verification

URL
Number
US9235669
Issuer
United States Patent and Trademark Office (USPTO), Alexandria, US
License
Use of the result by another entity is possible without acquiring a license in some cases
License Fee
The licensor does not require a license fee for the result in some cases
Owner
Codasip s.r.o.
Projects
Research and Development Tasks, CODASIP, start: 2015-06-03, end: 2019-12-31, completed
Departments
Faculty of Information Technology (FIT)
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