Result Details

The First Circuits Evolved in a Physical Virtual Reconfigurable Device

FRIEDL, Š.; SEKANINA, L. The First Circuits Evolved in a Physical Virtual Reconfigurable Device. Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems. Bratislava: Slovak Academy of Science, 2004. p. 35-42. ISBN: 80-969117-9-1.
Type
conference paper
Language
English
Authors
Friedl Štěpán, Ing., DCSY (FIT)
Sekanina Lukáš, prof. Ing., Ph.D., DCSY (FIT)
Abstract

This paper presents an alternative approach to designing complete evolvable systems on a single FPGA. The proposed strategy utilizes a virtual reconfigurable circuit and hardware implementation of the evolutionary algorithm. Using the evolvable system we have evolved various implementations of the 3x3-bit pipelined multipliers in a few seconds - the first circuits evolved in a physical reconfigurable device in the Czech Republic.

Keywords

evolvable hardware, evolutionary design, FPGA, IP core

Published
2004
Pages
35–42
Proceedings
Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Conference
The 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
ISBN
80-969117-9-1
Publisher
Slovak Academy of Science
Place
Bratislava
BibTeX 
@inproceedings{BUT16922,
  author="Štěpán {Friedl} and Lukáš {Sekanina}",
  title="The First Circuits Evolved in a Physical Virtual Reconfigurable Device",
  booktitle="Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems",
  year="2004",
  pages="35--42",
  publisher="Slovak Academy of Science",
  address="Bratislava",
  isbn="80-969117-9-1"
}
Projects
Evolvable hardware based applications design methods, GACR, Postdoktorandské granty, GP102/03/P004, start: 2003-01-01, end: 2005-12-31, completed
Research groups
Evolvable Hardware Research Group (RG EHW)
Departments
Department of Computer Systems (DCSY)
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