Result Details
Reconfigurable image processing architecture with simulink prototyping support
SCHIER, J.; KOVÁŘ, B.; ZEMČÍK, P.; HEROUT, A.; BERAN, V. Reconfigurable image processing architecture with simulink prototyping support. Sborník "Technical Computing 2005". Praha: 2005. p. 1-4.
Type
conference paper
Language
English
Authors
Schier Jan, Dr. Ing.
Kovář Bohumil
Zemčík Pavel, prof. Dr. Ing., dr. h. c., DCGM (FIT)
Herout Adam, prof. Ing., Ph.D., DCGM (FIT)
Beran Vítězslav, doc. Ing., Ph.D., DCGM (FIT)
Kovář Bohumil
Zemčík Pavel, prof. Dr. Ing., dr. h. c., DCGM (FIT)
Herout Adam, prof. Ing., Ph.D., DCGM (FIT)
Beran Vítězslav, doc. Ing., Ph.D., DCGM (FIT)
Abstract
The contribution is focused on conversion of block schematics prepared in Simulink into a scripting language so that the output can be used for reconfiguration of the flexible architecture based on DSP and FPGA for implementation of such block schematics.
Keywords
Simulink, DSP, FPGA, scripting language
Published
2005
Pages
1–4
Proceedings
Sborník "Technical Computing 2005"
Conference
Technical Computing 2005
Place
Praha
BibTeX
@inproceedings{BUT18056,
author="Jan {Schier} and Bohumil {Kovář} and Pavel {Zemčík} and Adam {Herout} and Vítězslav {Beran}",
title="Reconfigurable image processing architecture with simulink prototyping support",
booktitle="Sborník {"}Technical Computing 2005{"}",
year="2005",
pages="1--4",
address="Praha"
}
Projects
Rapid prototyping tools for development of HW-accelerated embedded image- and video-processing applications, AV ČR, Informační společnost (Národní program výzkumu), 1ET400750408, start: 2004-07-01, end: 2008-12-31, completed
Departments