Result Details
Speeding-up OAS and AAS Communication in Networking System on Chips
As chip multiprocessors are quickly penetrating new application areas in network and media processing, their interconnection architectures become a subject of optimization. Group communications are frequently used in many parallel algorithms and if their overhead is excessive, performance degrades rapidly with processor count. This paper deals with the design of a new application specific Bayesian Optimization Algorithm (BOA) and Standard Genetic Algorithm (SGA) that both produce almost optimal communication schedules for an arbitrary multiprocessor topology. We demonstrated the optimization process on hypercube and AMP topology using WH (Wormhole) switching.
BOA algorithm, communication patterns, multiprocessor topology, hypercube, AMP
The 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
@inproceedings{BUT21469,
author="Jiří {Jaroš} and Václav {Dvořák}",
title="Speeding-up OAS and AAS Communication in Networking System on Chips",
booktitle="Proc. of 8th IEEE Workshop on Design and Diagnostic of Electronic Circuits and Systems",
year="2005",
pages="206--209",
publisher="University of West Hungary",
address="Sopron",
isbn="9639364487"
}