Result Details

Gracefully Degrading Circuit Controllers Based on Polytronics

RŮŽIČKA, R. Gracefully Degrading Circuit Controllers Based on Polytronics. Proc. of 13th Euromicro Conference on Digital System Design. Los Alamitos: IEEE Computer Society, 2010. p. 809-812. ISBN: 978-0-7695-4171-6.
Type
conference paper
Language
English
Authors
Abstract

This paper proposes utilisation of polymorphic electronics to design digital circuit controllers that gracefully degrades when some inconvenient situation arise, e.g. when battery goes low or a chip temperature cross some safe level. In proposed approach, the next state logic of the controller is designed using polymorphic gates. Polymorphic gates exhibit two or more logic functions in according to a specific condition (e.g. Vdd level or special signals). This allows to make a smart reconfiguration of the circuit. An algorithm for designing gracefully degrading circuit controllers using polymorphic gates is proposed in the paper. Purpose of the algorithm is demonstrated on an example of a controller. This controller was physically realised and its functionality (especially in transient state) was verified.

Keywords

polymorphic electronics, polymorphic gates, digital circuit controllers, dependability

Published
2010
Pages
809–812
Proceedings
Proc. of 13th Euromicro Conference on Digital System Design
Conference
13th EUROMICRO Conference on Digital System Design, DSD'2010
ISBN
978-0-7695-4171-6
Publisher
IEEE Computer Society
Place
Los Alamitos
BibTeX
@inproceedings{BUT34835,
  author="Richard {Růžička}",
  title="Gracefully Degrading Circuit Controllers Based on Polytronics",
  booktitle="Proc. of 13th Euromicro Conference on Digital System Design",
  year="2010",
  pages="809--812",
  publisher="IEEE Computer Society",
  address="Los Alamitos",
  isbn="978-0-7695-4171-6"
}
Projects
Secured, reliable and adaptive computer systems, BUT, Vnitřní projekty VUT, FIT-S-10-1, start: 2010-03-01, end: 2010-12-31, completed
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
SoC circuits reliability and availability improvement, GACR, Standardní projekty, GA102/09/1668, start: 2009-01-01, end: 2011-12-31, completed
Research groups
Departments
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