Result Details
Specification and Synthesis of Reusable Modules in VHDL
Drábek Vladimír, doc. Ing., CSc.
Hardware-Software codesign, which implements a given specification with a set of system components such as ASIC, FPGA, CPLD, and processors, includes several key tasks such as system component allocation, functional partitioning, quality metrics estimation, and design space exploration. Hardware synthesis of embedded cores is one of the hardware-software codesign steps. In this paper, we focus on hardware reusable module specification. In addition, we describe how we can get many implementations to the specified reusable module using design space exploration during high-level synthesis (HLS) process. We propose a reusable module specification figure, and identify main concepts of the component created by the proposed methodology.
Hardware-software codesign, component allocation, functional partitioning, quality metrics estimation, design space exploration, reusable component
@inproceedings{BUT5428,
author="Azeddien {Sllame M.} and Vladimír {Drábek}",
title="Specification and Synthesis of Reusable Modules in VHDL",
booktitle="Proceedings of fourth International Wokshop on IEEE Design and Diagnostics of Electronic Circuits and Systems IEEE DDCSE01",
year="2001",
pages="137--140",
publisher="SZIF-UNIVERSITAS Ltd., Hungary",
address="Gyor, Hungary",
isbn="963-7175-16-4"
}