Result Details

CGP Acceleration Using Field-Programmable Gate Arrays

SEKANINA, L.; VAŠÍČEK, Z. CGP Acceleration Using Field-Programmable Gate Arrays. In Cartesian Genetic Programming. Natural Computing Series. Berlin: Springer Verlag, 2011. p. 217-230. ISBN: 978-3-642-17309-7.
Type
chapter in a book
Language
English
Authors
Sekanina Lukáš, prof. Ing., Ph.D., DCSY (FIT)
Vašíček Zdeněk, doc. Ing., Ph.D., DCSY (FIT)
Abstract

This chapter introduces different approaches to accelerate Cartesian Genetic Programming in Field Programmable Gate Arrays (FPGS). It is Chapter 7 of the book Miller J. F. (ed.):  Cartesian Genetic Programming. Springer Verlag, 2011.

Keywords

evolutionary computing, cartesian genetic programming, field programmable gate array

URL
Published
2011
Pages
217–230
Book
Cartesian Genetic Programming
Series
Natural Computing Series
ISBN
978-3-642-17309-7
Publisher
Springer Verlag
Place
Berlin
DOI
10.1007/978-3-642-17310-3_7
EID Scopus
2-s2.0-84870731760
BibTeX 
@inbook{BUT76458,
  author="Lukáš {Sekanina} and Zdeněk {Vašíček}",
  title="CGP Acceleration Using Field-Programmable Gate Arrays",
  booktitle="Cartesian Genetic Programming",
  year="2011",
  publisher="Springer Verlag",
  address="Berlin",
  series="Natural Computing Series",
  pages="217--230",
  doi="10.1007/978-3-642-17310-3\{_}7",
  isbn="978-3-642-17309-7",
  url="http://www.springer.com/cda/content/document/cda_downloaddocument/9783642173097-t1.pdf?SGWID=0-0-45-1208060-p174075057"
}
Projects
Natural Computing on Unconventional Platforms, GACR, Standardní projekty, GAP103/10/1517, start: 2010-01-01, end: 2013-12-31, running
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
Research groups
Evolvable Hardware Research Group (RG EHW)
Departments
Department of Computer Systems (DCSY)
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