Result Details

Verification of Fault-tolerant Methodologies for FPGA Systems

ZACHARIÁŠOVÁ, M.; KAŠTIL, J.; KOTÁSEK, Z. Verification of Fault-tolerant Methodologies for FPGA Systems. The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12). Annecy: Politecnico di Milano, 2012. p. 55-58.
Type
conference paper
Language
English
Authors
Zachariášová Marcela, Ing., Ph.D., DCSY (FIT)
Kaštil Jan, Ing., Ph.D., DCSY (FIT)
Kotásek Zdeněk, doc. Ing., CSc., DCSY (FIT), UTKO (FEEC)
Abstract

The aim of this paper is to fi nd a way how to utilize and compare diff erent FT methodologies we have been working with during the last few years as well as those which are new in the FT fi eld. Moreover, we present a platform for testing di erent FT methodologies implemented in an FPGA. The testing is based on the software-based injection of an SEU into the selected region of the FPGA from a PC through the JTAG interface. After fault injection into a non-speci c place in the FPGA it is necessary to explore the whole state space using input test vectors.

Keywords

fault-tolerant, FPGA, partial dynamic reconfiguration

Published
2012
Pages
55–58
Proceedings
The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)
Publisher
Politecnico di Milano
Place
Annecy
BibTeX 
@inproceedings{BUT97007,
  author="Marcela {Zachariášová} and Jan {Kaštil} and Zdeněk {Kotásek}",
  title="Verification of Fault-tolerant Methodologies for FPGA Systems",
  booktitle="The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'12)",
  year="2012",
  pages="55--58",
  publisher="Politecnico di Milano",
  address="Annecy"
}
Projects
Advanced secured, reliable and adaptive IT, BUT, Vnitřní projekty VUT, FIT-S-11-1, start: 2011-01-01, end: 2013-12-31, completed
Centrum excelence IT4Innovations, MŠMT, Operační program Výzkum a vývoj pro inovace, ED1.1.00/02.0070, start: 2011-01-01, end: 2015-12-31, completed
Methodologies for Fault Tolerant Systems Design Development, Implementation and Verification, MŠMT, COST CZ (2011-2017), LD12036, start: 2012-03-01, end: 2015-11-30, completed
National Support for Project Reduced Certification Costs Using Trusted Multi-core Platforms, MŠMT, Společné technologické iniciativy, 7H10013, start: 2010-04-01, end: 2013-03-31, running
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
Departments
Department of Computer Systems (DCSY)
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