Course details

Secure Hardware Devices

BZA Acad. year 2023/2024 Summer semester 5 credits

The main goal of the introductory part is to overview existing secure hardware devices. This is leading us toward the area of side channels. A statement that implementation of a device without a side channel is infeasible is guiding us through topics of their seriousness and evaluation. The following part is dedicated to two important attacks on side channels: Timing and power analyses. Timing analysis is applicable not only on secure devices but also on software implementations of security protocols. The simplest secure devices are smart-cards and we go through their design, electrical properties, communication protocols, and overall security. Power and fault analyses are two other very powerful attacks on smart-cards and we dedicate a couple of lectures to their theoretical descriptions and examples of results obtainable through these techniques. The topic of mitigation of side-channels' capacities and especially TEMPEST follow. The last logical part of the lectures belongs to hardware security modules: Evolution, principal applications, definition of API, and attacks on API with demonstrations of common errors.


Course coordinator

Language of instruction



Examination (written)

Time span

  • 39 hrs lectures
  • 13 hrs projects

Assessment points

  • 51 pts final exam (written part)
  • 20 pts mid-term test (written part)
  • 29 pts projects




Learning objectives

The course applies knowledge acquired in the courses of Cryptography and Security of Information Systems (although they are not necessary prerequisite) in a particular area. It exends students' proficiency in implementation of secure and cryptographic devices. The goal is to make students search and analyse side-channels (unintended sources of information).
Theoretical and practical proficiency in design of secure information systems based on secure hardware devices. Ability to integrate secure devices (from smart-cards to hardware security modules) and identify weaknesses. Skill in thinking from an attacker's point of view and ability to use it for IS design. Theoretical and practical knowledge of essential attack categories.
Students start looking at information systems from an attacker's point of view. They also learn to identify potentially disasterous parts of information systems.

Why is the course taught

This course is essential to all engineers working in the areas of computer engineering. Students will learn basic principles of information systems security and cryptography in hardware devices. 

Study literature

  • Cetin Kaya Koc: Cryptographic Engineering, Springer Publishing Company, 2008, ISBN: 0387718168 9780387718163
  • Menezes, A.J., van Oorschot, P., Vanstone, S.: Handbook of Applied Cryptography, CRC Press Series on Discrete Mathematics and Its Applications, Hardcover, 816 pages, CRC Press, 1997.
  • Bond, M. K.: Understanding Security APIs, PhD. thesis, Cambridge 2004.
  • Rankl, W., Effing, W.: Smart Card Handbook, John Wiley and Sons, pp. 1120, 3rd edition, 2004.

Syllabus of lectures

  • Introduction to secure hardware devices mentioning evolution, architectures, and applications. Random number generators (HW + SW).
  • Smart-cards - a lecture covering their design, electrical properties, communication protocols. Followed by their security properties and API security.
  • Side channels - their importance from the viewpoint of implementations, evaluations, and possible classification.
  • Timing analysis from its beginning in 1996 till actual implementations and performed attacks including detailed descriptions and definitions of the conditions necessary for its application.
  • Power and fault analyses represent powerful attacks on side channels available on smart-cards.
  • IoT security.
  • Half-term exam.
  • Nonarchitectural Attacks - Specter, Meltdown, Cache Abuse, Predictors, etc.
  • Student presentations on selected topics.
  • LFSR.
  • Protection of devices against side channels, various approaches to protection, principles, influence on the functionality of the devices.
  • Reverse Engineering - Techniques, Instruments, Examples.
  • Hardware security modules (HSM) and their evolution, main applications including examples of deployment and design of protocols based on HSMs.

Progress assessment

Control of the study is performed via mid-term exam, completion of due course projects, and final exam. Evaluation of projects is based on the completeness and correctness of the delivered solutions.


Tue exam 2024-06-04 E104 09:0010:50 3. termín
Tue exam 2024-05-21 E112 13:0014:50 1. termín
Tue exam 2024-05-28 A112 13:0014:50 2. termín
Wed exam 2024-03-20 G202 11:0012:30 půlsemestrální test
Wed lecture 1., 2., 3., 5. of lectures G202 11:0013:5080 1MIT 2MIT NIDE NSEC xx Hanáček
Wed lecture 4., 6., 7., 8., 9., 11., 12. of lectures G202 11:0013:5080 1MIT 2MIT NIDE NSEC xx Malinka
Wed lecture 2024-04-10 G202 11:0013:5080 1MIT 2MIT NIDE NSEC xx Holop

Course inclusion in study plans

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