Computer and Embedded Systems

Students will get acquainted with theoretical aspects of behaviour description and behaviour modelling, design and its verification, testing computer systems, and they will be learned the principles of the synthesis and analysis of functional units of computers and other digital devices. Further, they will be informed about the architectures of computer systems with the emphasis on multi-processor, reconfigurable and distributed systems. They will understand the principles of formal specification and their implementation in the design of embedded systems, they will be able to utilize andvanced techniques for rapid prototyping and the implementation of typical applications.

The State Final Examination has two parts: A defence of the Master Thesis, and a discussion based on selected topics from the course "Computer and Embedded Systems" which is derived from compulsory courses of the MPV Branch of Study as Architektura procesorů, Hardware/Software Codesign, Matematické struktury v informatice, Teoretická informatika, Architektura a programování paralelních systémů, Funkcionální a logické programování, Kódování a komprese dat, Návrh externích adaptérů a vestavěných systémů, Paralelní a distribuované algoritmy, Pokročilé číslicové systémy, Přenos dat, počítačové sítě a protokoly and Zpracování obrazu. The areas of possible questions must be approved by the Study Branch Council, and students will be informed about the selected topics at least 2 months before the state final examination is held in the particular academic year. The discussion will be held on two topics.

Master's theses are stored at the FIT library, Božetěchova 2, Brno. The list of the master's theses, including the details is available at:
https://www.fit.vut.cz/study/theses/.en