Thesis Details
Evoluční návrh pro aproximaci obvodů
In recent years, there has been a strong need for the design of integrated circuits showing low power consumption. It is possible to create intentionally approximate circuits which don't fully implement the specified logic behaviour, but exhibit improvements in term of area, delay and power consumption. These circuits can be used in many error resilient applications, especially in signal and image processing, computer graphics, computer vision and machine learning. This work describes an evolutionary approach to approximate design of arithmetic circuits and other more complex systems. This text presents a parallel calculation of a fitness function. The proposed method accelerated evaluation of 8-bit approximate multiplier 170 times in comparison with the common version. Evolved approximate circuits were used in different types of edge detectors.
approximation, approximate computing, evolutionary circuit design, cartesian genetic programming, error measurement, circuit optimization
Bartík Vladimír, Ing., Ph.D. (DIFS FIT BUT), člen
Martínek Tomáš, doc. Ing., Ph.D. (DCSY FIT BUT), člen
Meduna Alexander, prof. RNDr., CSc. (DIFS FIT BUT), člen
Steingartner William, Ing., Ph.D. (TUKE), člen
Zbořil František, doc. Ing., Ph.D. (DITS FIT BUT), člen
@mastersthesis{FITMT14753, author = "Petr Dvo\v{r}\'{a}\v{c}ek", type = "Master's thesis", title = "Evolu\v{c}n\'{i} n\'{a}vrh pro aproximaci obvod\r{u}", school = "Brno University of Technology, Faculty of Information Technology", year = 2015, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/14753/" }