Thesis Details
Generování pseudonáhodných čísel v FPGA
This bachelor thesis analyzes various implementations of pseudorandom number generators. In particular, two most-widely used mechanisms in generating the pseudorandom numbers in digital systems based on linear feedback shift register (LFSR) and cellular automata (CA) are described. Two models which are also widely used in practice were chosen from each group and implemented in C language. Additionally, another interesting combinatorial scheme of LFSR which is also sometimes used was implemented. Evaluation of the generators using Diehard set of statistical test was performed as well. Another part of this work dealt with implementing the chosen generators in a hardware description language. The choice was made for VHDL and several models, including the serial and parallel type of LFSR, were described in this language. Finally, a serial type of LFSR was implemented on the educational platform FITKit. The demands for area consumption of implemented generators were also investigated.
Pseudorandom numbers, Linear feedback shift register, Cellular automata, Diehard, FPGA, FITKit
Černocký Jan, prof. Dr. Ing. (DCGM FIT BUT), člen
Fučík Otto, doc. Dr. Ing. (DCSY FIT BUT), člen
Herout Adam, prof. Ing., Ph.D. (DCGM FIT BUT), člen
Jedlička Petr, Ing., Ph.D. (Mendelu), člen
Peringer Petr, Dr. Ing. (DITS FIT BUT), člen
@bachelorsthesis{FITBT1620, author = "Pavol Kor\v{c}ek", type = "Bachelor's thesis", title = "Generov\'{a}n\'{i} pseudon\'{a}hodn\'{y}ch \v{c}\'{i}sel v FPGA", school = "Brno University of Technology, Faculty of Information Technology", year = 2007, location = "Brno, CZ", language = "czech", url = "https://www.fit.vut.cz/study/thesis/1620/" }