Result Details

Design and Simulation of High Performance Parallel Architectures Using the ISAC Language

PŘIKRYL, Z.; KŘOUSTEK, J.; HRUŠKA, T.; KOLÁŘ, D.; MASAŘÍK, K.; HUSÁR, A. Design and Simulation of High Performance Parallel Architectures Using the ISAC Language. GSTF International Journal on Computing, 2011, vol. 1, no. 2, p. 97-106. ISSN: 2010-2283.
Type
journal article
Language
English
Authors
Přikryl Zdeněk, Ing., Ph.D., FIT (FIT), DIFS (FIT)
Křoustek Jakub, Ing., Ph.D., FIT (FIT), DIFS (FIT)
Hruška Tomáš, prof. Ing., CSc., DIFS (FIT)
Kolář Dušan, doc. Dr. Ing., DIFS (FIT)
Masařík Karel, Ing., Ph.D., DIFS (FIT)
Husár Adam, Ing., Ph.D., FIT (FIT), DIFS (FIT)
Abstract

Most of modern embedded systems for multimedia and network applications are based on parallel data stream processing. The data processing can be done using very long instruction word processors (VLIW), or using more than one high performance application-specific instruction set processor (ASIPs), or even by their combination on single chip.

Design and testing of these complex systems is time-consuming and iterative process. Architecture description languages (ADLs) are one of the most effective solutions for single processor design. However, support for description of parallel architectures and multi-processor systems is very low or completely missing in nowadays ADLs. This article presents utilization of new extensions for existing architecture description language ISAC. These extensions are used for easy and fast prototyping and testing of parallel based systems and processors.

This article extends the previous publication on RTES 2010 conference.

Keywords

Architecture description language, ISAC, VLIW, multiprocessor system on a chip, simulation, debugging

URL
Published
2011
Pages
97–106
Journal
GSTF International Journal on Computing, vol. 1, no. 2, ISSN 2010-2283
Book
GSTF International Journal on Computing
Publisher
Global Science & Technology Forum
Place
Singapur
DOI
10.5176/2010-2283_1.2.46
BibTeX 
@article{BUT76296,
  author="Zdeněk {Přikryl} and Jakub {Křoustek} and Tomáš {Hruška} and Dušan {Kolář} and Karel {Masařík} and Adam {Husár}",
  title="Design and Simulation of High Performance Parallel Architectures Using the ISAC Language",
  journal="GSTF International Journal on Computing",
  year="2011",
  volume="1",
  number="2",
  pages="97--106",
  doi="10.5176/2010-2283\{_}1.2.46",
  issn="2010-2283",
  url="http://dl4.globalstf.org/?wpsc-product=design-and-simulation-of-high-performance-parallel-architectures-using-the-isac-language"
}
Projects
Mathematical and Engineering Approaches to Developing Reliable and Secure Concurrent and Distributed Computer Systems, GACR, Doktorské granty, GD102/09/H042, start: 2009-01-30, end: 2012-12-31, completed
National Support for Project Smart Multicore Embedded SYstems, MŠMT, Společné technologické iniciativy, 7H10014, start: 2010-02-01, end: 2013-01-31, running
Recognition and presentation of multimedia data, BUT, Vnitřní projekty VUT, FIT-S-10-2, 2010, start: 2010-04-01, end: 2010-12-31, completed
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
System for Programming and Realization of Embedded Systems, MPO, TIP, FR-TI1/038, start: 2009-07-01, end: 2013-06-30, completed
Research groups
Formal Model Research Group (RG FM)
Hardware-Software Codesign research group (RG LISSOM)
Departments
Department of Information Systems (DIFS)
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