Result Details
Structural Equivalence between Architectural Descriptive and Hardware Languages
Hruška Tomáš, prof. Ing., CSc., DIFS (FIT)
Formal description of the transformation between the ISAC language and RTL in VHDL, further description of the structural equivalence between both languages.
Hardware/software co-design, architecture description language, hardware language, equivalence
Programmable architectures create a core of embedded systems. The area of hardware/software co-design deals with the design of these architectures. The area explores a design space for given tasks based on some criteria (cost, consumption, etc.). The success of the exploration phase is influenced with the existence of proper architecture's model, which enables to create software tools for programming and simulation of the architecture, moreover model enables to create the hardware realization according to it. The question is, if the hardware solution is semantically identical to the model. This paper deals with this problem and provides a partly solution.
@inproceedings{BUT28813,
author="Karel {Masařík} and Tomáš {Hruška}",
title="Structural Equivalence between Architectural Descriptive and Hardware Languages",
booktitle="A proceedings volume from the 4th International Conference on Cybernetics and Information Technologies, Systems and Applications CITSA 2007",
year="2007",
pages="40--45",
publisher="International Institute of Informacs and Systemics",
address="Florida",
isbn="1-934272-10-8"
}Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running