Result Details
Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip
BOHRN, M.; FUJCIK, L.; VRBA, R. Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip. In ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization. 1. Portugal: INSTICC PRESS, 2009. p. 149-152. ISBN: 978-989-8111-99-9.
Type
conference paper
Language
English
Authors
Bohrn Marek, Ing., Ph.D., UMEL (FEEC)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Vrba Radimír, prof. Ing., CSc., RE-KancQ (RO), UMEL (FEEC)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEEC)
Vrba Radimír, prof. Ing., CSc., RE-KancQ (RO), UMEL (FEEC)
Abstract
The paper describes multi-core computing unit implemented into FPGA chip. The unit is used for accelerating of Artificial Neural Networks computations.
Keywords
Artificial neural networks, Computation acceleration, FPGA, VHDL, Spartan-3
Published
2009
Pages
149–152
Proceedings
ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization
Series
1
Edition
1
Conference
ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics
ISBN
978-989-8111-99-9
Publisher
INSTICC PRESS
Place
Portugal
BibTeX
@inproceedings{BUT32550,
author="Marek {Bohrn} and Lukáš {Fujcik} and Radimír {Vrba}",
title="Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip",
booktitle="ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization",
year="2009",
series="1",
number="1",
pages="149--152",
publisher="INSTICC PRESS",
address="Portugal",
isbn="978-989-8111-99-9"
}
Departments