Detail výsledku

Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip

BOHRN, M.; FUJCIK, L.; VRBA, R. Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip. In ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization. 1. Portugal: INSTICC PRESS, 2009. p. 149-152. ISBN: 978-989-8111-99-9.
Typ
článek ve sborníku konference
Jazyk
anglicky
Autoři
Bohrn Marek, Ing., Ph.D., UMEL (FEKT)
Fujcik Lukáš, doc. Ing., Ph.D., UMEL (FEKT)
Vrba Radimír, prof. Ing., CSc., RE-KancQ (RE), UMEL (FEKT)
Abstrakt

The paper describes multi-core computing unit implemented into FPGA chip. The unit is used for accelerating of Artificial Neural Networks computations.

Klíčová slova

Artificial neural networks, Computation acceleration, FPGA, VHDL, Spartan-3

Rok
2009
Strany
149–152
Sborník
ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization
Řada
1
Vydání
1
Konference
ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics
ISBN
978-989-8111-99-9
Vydavatel
INSTICC PRESS
Místo
Portugal
BibTeX 
@inproceedings{BUT32550,
  author="Marek {Bohrn} and Lukáš {Fujcik} and Radimír {Vrba}",
  title="Multi-Core Computing Unit for Artificial Neural Networks in FPGA Chip",
  booktitle="ICINCO 2009 6th International Conference on Informatics in Control, Automationa and Robotics Proceedings Volume 1 - Inteligent Control Systems and Optimization",
  year="2009",
  series="1",
  number="1",
  pages="149--152",
  publisher="INSTICC PRESS",
  address="Portugal",
  isbn="978-989-8111-99-9"
}
Pracoviště
Ústav mikroelektroniky (UMEL)
Nahoru