Result Details
Automatic C Compiler Generation from Architecture Description Language ISAC
Trmač Miloslav, Mgr., FIT (FIT)
Hranáč Jan, Ing.
Hruška Tomáš, prof. Ing., CSc., DIFS (FIT)
Masařík Karel, Ing., Ph.D., FIT (FIT), DIFS (FIT)
Kolář Dušan, doc. Dr. Ing., DIFS (FIT)
Přikryl Zdeněk, Ing., Ph.D., FIT (FIT), DIFS (FIT)
This paper deals with retargetable compiler generation. After an introduction to application-specific instruction set processor design and a
review of code generation in compiler backends, ISAC architecture description language is introduced. Automatic approach to instruction semantics extraction from ISAC models which result is usable for backend generation is presented. This approach was successfully tested on three models of MIPS, ARM and TI MSP430 architectures. Further backend generation process that uses extracted instruction is semantics presented. This process was currently tested on the MIPS architecture and some preliminary results are shown.
retargetable compilers, ADL, ISAC, Lissom
@inproceedings{BUT34419,
author="Adam {Husár} and Miloslav {Trmač} and Jan {Hranáč} and Tomáš {Hruška} and Karel {Masařík} and Dušan {Kolář} and Zdeněk {Přikryl}",
title="Automatic C Compiler Generation from Architecture Description Language ISAC",
booktitle="6th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science",
year="2010",
pages="84--91",
publisher="Masaryk University",
address="Brno",
isbn="978-80-87342-10-7"
}
National Support for Project Smart Multicore Embedded SYstems, MŠMT, Společné technologické iniciativy, 7H10014, start: 2010-02-01, end: 2013-01-31, running
Security-Oriented Research in Information Technology, MŠMT, Institucionální prostředky SR ČR (např. VZ, VC), MSM0021630528, start: 2007-01-01, end: 2013-12-31, running
System for Programming and Realization of Embedded Systems, MPO, TIP, FR-TI1/038, start: 2009-07-01, end: 2013-06-30, completed