Course details

Diagnosis and Safe Systems

DIA Acad. year 2003/2004 Winter semester 6 credits

Current academic year

Fault models of TTL, CMOS, PLA and bridge faults. Test generation methods. Structural tests. Functional tests. Sequential circuit testing. RTL level test generation. Random and pseudorandom test generation. Locating sequences. Fault dictionaries. Diagnostic data compression. Design for testability, structured methods. Built-in diagnosis. Memory testing. Processor and wiring testing. Fail-safe circuits. Instrumentation for diagnosis. Verification approaches.

Details ...

Guarantor

Drábek Vladimír, doc. Ing., CSc.

Language of instruction

Czech

Completion

Examination

Time span

Department

Department of Computer Systems (UPSY)

Subject specific learning outcomes and competences

Basic approaches to test generation and design for testability.

Learning objectives

To give the students the knowledge of methods for generation the tests for logic circuits, minimization and compression algorithms, and approaches to the design of testable circuits.

Progress assessment

Mid-term exam and a project.

Course inclusion in study plans

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