Thesis Details
Novel approach to polymorphism in gate-level digital circuits
Nearly twenty years ago, a non-conventional approach to implementation of multifunctional circuits called polymorphic electronics was proposed. The concept of polymorphic electronics allows to implement two or more functions in a single circuit, whereas the currently selected function depends on the state of the circuit operating environment. Key components of such circuits are polymorphic gates. Since the introduction of polymorphic electronics, several dozens of polymorphic gates have been published. However, a large number of them do not meet reasonable parameters. As a result, perspective of their utilisation for real applications becomes rather bleak. This dissertation introduces a new approach to the polymorphic electronics. It is based on gates whose behaviour depends on polarity of dedicated power supply rails. The goal of this thesis is to show that such approach allows to design gates with significantly better parameters. In order to systematically design proposed gates at the transistor level, an evolutionary method based on Cartesian genetic programming was proposed. That allowed to design several sets of efficient polymorphic gates employing conventional MOSFET and emerging double-gate ambipolar transistors. These gate sets were arranged into a library which is currently freely available for other researchers. Furthermore, a number of more complex circuits based on proposed gates were designed in this thesis. It is demonstrated at various levels of circuit design (gate, RTL, application) that the proposed gate-level polymorphism provides significant advantages compared to the first generation of polymorphic gates, but it can also be competitive or even better compared to the conventional CMOS solutions.
Polymorphic electronics, multifunctional gate, polymorphic gate, ambipolar transistor, MOSFET, digital circuit, PoLibSi
@phdthesis{FITPT948,
author = "Jan Nevoral",
type = "Ph.D. thesis",
title = "Novel approach to polymorphism in gate-level digital circuits",
school = "Brno University of Technology, Faculty of Information Technology",
year = 2020,
location = "Brno, CZ",
language = "english",
url = "https://www.fit.vut.cz/study/phd-thesis/948/"
}