Course details

Processor Architecture

ACH Acad. year 2016/2017 Winter semester 5 credits

Current academic year

Guarantor

Dvořák Václav, prof. Ing., DrSc.

Language of instruction

Czech

Completion

Credit+Examination (written)

Time span

Assessment points

  • 60 pts final exam (written part)
  • 10 pts mid-term test (written part)
  • 30 pts projects

Department

Department of Computer Systems (UPSY)

Study literature

Fundamental literature

  • Baer, J.L.: Microprocessor Architecture. Cambridge University Press, 2010, 367 s., ISBN 978-0-521-76992-1.
  • Hennessy, J.L., Patterson, D.A.: Computer Architecture - A Quantitative Approach. 5. vydání, Morgan Kaufman Publishers, Inc., 2012, 1136 s., ISBN 1-55860-596-7. 
  • Kirk, D., and Hwu, W.: Programming Massively Parallel Processors: A Hands-on Approach, Elsevier, 2010, s. 256, ISBN: 978-0-12-381472-2
  • Jeffers, J., and Reinders, J.: Intel Xeon Phi Coprocessor High Performance Programming, 2013, Morgan Kaufmann, p. 432), ISBN: 978-0-124-10414-3

Course inclusion in study plans

  • Programme IT-MGR-2, field MBI, MIN, MIS, MMM, any year of study, Elective
  • Programme IT-MGR-2, field MBS, any year of study, Compulsory-Elective
  • Programme IT-MGR-2, field MGM, 2nd year of study, Elective
  • Programme IT-MGR-2, field MPV, 2nd year of study, Compulsory
  • Programme IT-MGR-2, field MSK, 2nd year of study, Compulsory-Elective
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