Course details

Design of Computer Systems

INP Acad. year 2005/2006 Winter semester 5 credits

Current academic year

Von Neumann computer. Introduction to VHDL. Performance evaluation. Data types, formats and coding. Instructions, formats, coding and addressing, ISA. VHDL models of algorithms and subsystems. Pipelining. Arithmetic and logic operations. Algorithms and function units. Sequencer: basic function, hard-wired and microprogram implementation. Memories: types, organization, controlling. Memory hierarchies, virtual memory. Peripheral units, buses and bus control, parallel and serial digital interfaces.

Guarantor

Language of instruction

Czech, English

Completion

Credit+Examination

Time span

  • 39 hrs lectures
  • 5 hrs exercises
  • 4 hrs pc labs
  • 4 hrs projects

Department

Subject specific learning outcomes and competences

Students are able to describe the functionality of operation, memory and control units and their communication using VHDL.

The opinion on development trends and possibilities of computer technology.

Learning objectives

To give the students the knowledge of organization and functioning of operation, memory and control units, the algorithms with fixed and floating point operations, the way of controlling them and subsystem communication level.

Recommended prerequisites

Prerequisite knowledge and skills

Boolean algebra, basics of electrical circuits, basic computer elements, design of combinatorial and sequential circuits.

Fundamental literature

  • Hennessy J. L., Patterson D. A.: Computer Architecture: A Quantitative Approach, 2nd edition, Morgan Kaufmann Publ., 1996, and new editions, e.g. the 5th ed. from 2012.

Syllabus of lectures

  • Computer history, classification, introduction to VHDL.
  • Computer performance and performance evaluation.
  • Instruction sets, register structures.
  • Data representation, accuracy and errors.
  • Pipelined processing, modelling in VHDL.
  • Algorithms of fixed point operations.
  • Algorithms of floating point operations, iterative algorithms.
  • Mid-term exam, hard-wired sequencer.
  • Microprogram controller.
  • Memories.
  • Cache memory, virtual memory.
  • Parallel and serial buses.
  • Peripheral interfacing and control.

Syllabus of numerical exercises

  • Performance evaluation, revision of logic circuits, IEC 617.
  • Huffman code, Hamming code, FX signed number codes.
  • Overflow detection, adder, look-ahead carry generator.
  • Pipelined processing
  • ALU 181 operations, multiplication.
  • Booth recoding.
  • Division.
  • Iterative algorithms.

Syllabus of computer exercises

  • GALs programming - adder.
  • Multiplier for non-signed numbers.
  • Booth recoding multiplier.
  • Radix 4 division.
  • Dynamic memory of IBM PC.
  • Simulator and programmer of EPROMs.
  • Hamming code decoder in VHDL.
  • Moving head disc memory sequencer.

Progress assessment

Duty credit consists of mid-term exam passing, submitting laboratory reports and completing projects in due dates.

Controlled instruction

Realization of projects, realization of computer lab experiments, mid-term exam passing.

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